2

3

4

5

6

7

13

1

12

11

10

9

8

OUT_L

14

GND

MUTE

VSS

CN

CP

–IN_L

NC

VDD

GND

GAIN

OUT_R

–IN_R

NC

GAIN

GND

VDD

GND

MUTE

GND

OUT_L

OUT_R

1

3

4

2

12

10

9

11

RGT PACKAGE

QFN

(TOP VIEW)

PW PACKAGE

TSSOP

(TOP VIEW)

TPA6139A2

SLOS700B – JANUARY 2011 – REVISED JUNE 2012

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

GENERAL INFORMATION

PIN ASSIGNMENT

The TPA6139A2 is available in the:

•

14-pin TSSOP package (PW) or

•

16-pin QFN package (RGT)

PIN FUNCTIONS

PIN

DESCRIPTION

NAME

PW NO.

RGT NO.

-IN_L

1

16

I

Negative input, left channel

OUT_L

2

1

O

Output, left channel

GND

3, 11

2, 3, 10

P

Ground

MUTE

4

4

I

MUTE, active low

VSS

5

5

O

Change Pump negative supply voltage

CN

6

6

I/O

Charge Pump flying capacitor negative connection

NC

7, 8

7. 14, 15

No internal connection

CP

9

8

I/O

Charge Pump flying capacitor positive connection

VDD

10

9

P

Supply voltage, connect to positive supply

GAIN

12

11

I

Gain set programming pin; connect a resistor to ground.

See Table 1 for recommended resistor values

OUT_R

13

12

O

Output, right channel

-IN_R

14

13

I

Negative input, right channel

(1)

I = input, O = output, P = power

2

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Product Folder Link(s) :TPA6139A2