XTNETA1570MFP datasheet(6/68 Pages) TI1

Part #	XTNETA1570MFP

Description	ATM SEGMENTATION AND REASSEMBLY DEVICE WITH INTEGRATED 64-BIT PCI-HOST INTERFACE

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Manufacturer	TI1 [Texas Instruments]

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TNETA1570

ATM SEGMENTATION AND REASSEMBLY DEVICE

WITH INTEGRATED 64BIT PCIHOST INTERFACE

SDNS033B − JUNE 1995 − REVISED MAY 1996

6

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

Terminal Functions (Continued)

cell-reassembly interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

Reassembly cell available

RESCLAV

69

O

(CMOS)

PHY mode

RESCLAV (TXFULL /TXCLAV) indicates that a transfer of a complete cell can be

accepted.

RESCLAV

69

(CMOS)

ATM mode

RESCLAV (RXENB) indicates that a valid byte RESDATA will be sent during the

next clock cycle.

Reassembly clock

RESCLK

66

I

(TTL)

PHY mode

RESCLK (TXCLK) is used to synchronize transfers on RESDATA. ATMCLK is

used as the source for RESCLK.

RESCLK

66

(TTL)

ATM mode

RESCLK (RXCLK) is used to synchronize transfers on RESDATA. ATMCLK is

used as the source for RESCLK.

RESDATA7 −

72 − 75,

I

Reassembly data

RESDATA7 −

RESDATA0

72 − 75,

77 − 80

I

(TTL)

PHY mode

RESDATA7 − RESDATA0 (TXDATA). RESDATA7 is the MSB.

RESDATA0

77 − 80

(TTL)

ATM mode

RESDATA7 − RESDATA0 (RXDATA). RESDATA7 is the MSB.

Reassembly enable

RESEN

67

I

(TTL)

PHY mode

RESEN (TXENB) goes active low when RESDATA contains a valid byte.

RESEN

67

I

(TTL)

ATM mode

RESEN (RXEMPTY/RXCLAV) indicates that RESDATA will be sent during the

next clock cycle.

I

Reassembly parity

RESPAR

71

I

(TTL)

PHY mode

RESPAR (TXPAR) is the odd-parity bit over RESDATA7 − RESDATA0.

RESPAR

71

(TTL)

ATM mode

RESPAR (RXPAR) is the odd-parity bit over RESDATA7 − RESDATA0.

O

Reassembly parity error (not required by UTOPIA)

RESPERR

81

O

(CMOS)

PHY mode

RESPERR indicates that parity error is present at the previous rising edge of

RESPERR

81

(CMOS)

ATM mode

RESPERR indicates that parity error is present at the previous rising edge of

RESCLK.

Reassembly start of cell

RESSOC

70

I

(TTL)

PHY mode

RESSOC (TXSOC) is received when RESDATA contains the first valid byte of the

cell.

RESSOC

70

(TTL)

ATM mode

RESSOC (RXSOC) is received when RESDATA contains the first valid byte of the

cell.

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