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TLC59116F Datasheet(PDF) 7 Page - Texas Instruments |
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TLC59116F Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 31 page  ACK OR READ CYCLE START SCL SDA RESET OUTx LED OFF 30% 30% 50% 50% 50% 50% t REC t RESET t RESET t W t BUF t LOW t HD;STA t HD;STA t SP t SU;STO t SU;STA t SU;DAT t HD;DAT t HIGH t f SCL P Sr S P SDA t r SCL SDA Protocol START (S) Condition Bit 7 MSB (A7) Bit 6 (A6) Bit 7 (D1) Bit 8 (D0) Acknowledge (A) STOP Condition (P) tBUF tLOW 1/fSCL tHD;STA TSU;STO tSU;DAT tSU;STA tHD;DAT tVD;DAT tVD;ACK tHIGH tf tr TLC59116F www.ti.com SCLS714B – MARCH 2009 – REVISED JULY 2011 PARAMETER MEASUREMENT INFORMATION Figure 1. Definition of RESET Timing Figure 2. Definition of Timing A. Rise and fall times refer to VIL and VIH. Figure 3. I2C Bus Timing Copyright © 2009–2011, Texas Instruments Incorporated 7 |
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