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TLC5940-EP Datasheet(PDF) 3 Page - Texas Instruments |
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TLC5940-EP Datasheet(HTML) 3 Page - Texas Instruments |
3 / 33 page TLC5940-EP www.ti.com SLVSA51D – MARCH 2010 – REVISED MAY 2010 THERMAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) RHB PWP THERMAL METRIC(1) UNIT 32 PINS 28 PINS qJA Junction-to-ambient thermal resistance(2) 33.9 35.4 °C/W qJC(TOP) Junction-to-case (top) thermal resistance(3) 30 24.94 °C/W qJC(BOTTOM) Junction-to-case (bottom) thermal resistance(4) 3.9 5.37 °C/W qJB Junction-to-board thermal resistance(5) 9.3 15.02 °C/W ΨJT Junction-to-top characterization parameter(6) 0.619 1.297 °C/W ΨJB Junction-to-board characterization parameter(7) 9.3 10.96 °C/W (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as specified in JESD51-7, in an environment described in JESD51-2a. (3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. (4) The junction to case (bottom) thermal resistance is obtained by simulations of this device as configured per MilStd 883 method 1012.1. (5) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. (6) The junction-to-top characterization parameter, ΨJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7). (7) The junction-to-board characterization parameter, ΨJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7). ABSOLUTE MAXIMUM RATINGS. over operating free-air temperature range (unless otherwise noted) (1) (2) UNIT VI Input voltage range(3) VCC –0.3V to 6V IO Output current (dc) 130mA VI Input voltage range V(BLANK), V(DCPRG), V(SCLK), V(XLAT), V(SIN), V(GSCLK), V(IREF) –0.3V to VCC +0.3V V(SOUT), V(XERR) –0.3V to VCC +0.3V VO Output voltage range V(OUT0) to V(OUT15) –0.3V to 18V EEPROM program range V(VPRG) –0.3V to 24V EEPROM write cycles 25 HBM (JEDEC JESD22-A114, Human Body Model) 2kV ESD rating CBM (JEDEC JESD22-C101, Charged Device Model) 500V Tstg Storage temperature range –55°C to 150°C TA Operating ambient temperature range –40°C to 125°C Package thermal impedance See Thermal Characteristics table (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. (2) Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life. See www.ti.com/ep_quality for additional information on enhanced plastic packaging. (3) All voltage values are with respect to network ground terminal. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TLC5940-EP |
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