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MAX7034 Datasheet(PDF) 10 Page - Maxim Integrated Products

Part No. MAX7034
Description  315MHz/434MHz ASK Superheterodyne Receiver
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Maker  MAXIM [Maxim Integrated Products]
Homepage  http://www.maxim-ic.com
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MAX7034 Datasheet(HTML) 10 Page - Maxim Integrated Products

 
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It is possible to use an external reference oscillator in
place of a crystal to drive the VCO. AC-couple the exter-
nal oscillator to XTAL2 with a 1000pF capacitor. Drive
XTAL2 with a signal level of approximately 500mVP-P.
AC-couple XTAL1 to ground with a 1000pF capacitor.
Data Filter
The data filter is implemented as a 2nd-order lowpass
Sallen-Key filter. The pole locations are set by the com-
bination of two on-chip resistors and two external
capacitors. Adjusting the value of the external capaci-
tors changes the corner frequency to optimize for differ-
ent data rates. The corner frequency should be set to
approximately 1.5 times the fastest expected data rate
from the transmitter. Keeping the corner frequency near
the data rate rejects any noise at higher frequencies,
resulting in an increase in receiver sensitivity.
The configuration shown in Figure 1 can create a
Butterworth or Bessel response. The Butterworth filter
offers a very flat amplitude response in the passband
and a rolloff rate of 40dB/decade for the two-pole filter.
The Bessel filter has a linear phase response, which
works well for filtering digital data. To calculate the
value of C7 and C6, use the following equations, along
with the coefficients in Table 1:
where fC is the desired 3dB corner frequency.
For example, to choose a Butterworth filter response
with a corner frequency of 5kHz:
Choosing standard capacitor values changes C7 to
470pF and C6 to 220pF, as shown in the
Typical
Application Circuit.
Data Slicer
The data slicer takes the analog output of the data filter
and converts it to a digital signal. This is achieved by
using a comparator and comparing the analog input to
a threshold voltage. One input is supplied by the data
filter output. Both comparator inputs are accessible off-
chip to allow for different methods of generating the
slicing threshold, which is applied to the second com-
parator input.
The suggested data slicer configuration uses a resistor
(R1) connected between DSN and DSP with a capaci-
tor (C8) from DSN to DGND (Figure 2). This configura-
tion averages the analog output of the filter and sets the
threshold to approximately 50% of that amplitude. With
this configuration, the threshold automatically adjusts
as the analog signal varies, minimizing the possibility
for errors in the digital data. The values of R1 and C8
affect how fast the threshold tracks to the analog ampli-
tude. Be sure to keep the corner frequency of the RC
circuit much lower than the lowest expected data rate.
Note that a long string of zeros or ones can cause the
threshold to drift. This configuration works best if a cod-
ing scheme, such as Manchester coding, which has an
equal number of zeros and ones, is used.
To prevent continuous toggling of DATAOUT in the
absence of an RF signal due to noise, add hysteresis to
the data slicer as shown in Figure 3.
C
kkHz
pF
C
7
1 000
1 414 100
3 14
5
450
.
..
= ()(
)(
)(
)
Ω
6
6
1 414
4 100
3 14
5
225
.
.
= ()(
)(
)(
)
kkHz
pF
Ω
C
b
ak
f
C
a
kf
C
C
7
100
6
4 100
= ()( )()
= ()( )()
π
π
315MHz/434MHz ASK Superheterodyne
Receiver
10
RSSI
RDF1
100k
Ω
RDF2
100k
Ω
C7
19
DFO
21
OPP
22
DFFB
C6
MAX7034
FILTER TYPE
a
b
Butterworth (Q = 0.707)
1.414
1.000
Bessel (Q = 0.577)
1.3617
0.618
Figure 1. Sallen-Key Lowpass Data Filter
Table 1. Coefficents to Calculate C7 and C6


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