ADC1215S datasheet(30/40 Pages) IDT

Part #	ADC1215S

Description	Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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ADC1215S_SER 3

Product data sheet

Rev. 03 — 2 July 2012

30 of 40

Integrated Device Technology

ADC1215S series

Single 12-bit ADC; input buffer; CMOS or LVDS DDR digital output

Fig 29. Default mode at start-up: SCLK LOW = offset binary; SDIO HIGH = LVDS DDR

Fig 30. Default mode at start-up: SCLK HIGH = two’s complement; SDIO LOW = CMOS

CS

SDIO

(CMOS LVDS DDR)

SCLK

(Data format)

Offset binary, LVDS DDR

default mode at start-up

005aaa063

SDIO

(CMOS LVDS DDR)

SCLK

(Data format)

two's complement, CMOS

default mode at start-up

005aaa064

CS

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Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	ADC1215S	287Kb / 39P	Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs Rev. 01-12 April 2010
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Integrated Device Techn...	ADC1210S	386Kb / 37P	Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
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NXP Semiconductors	ADC1212D	1Mb / 42P	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs Rev. 2-4 March 2011
Renesas Technology Corp	ADC1212D	672Kb / 40P	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs 2 July 2012
Integrated Device Techn...	ADC1212D	668Kb / 40P	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

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ADC1215S Datasheet(PDF) 30 Page - Integrated Device Technology

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