ADC1113S125 datasheet(30/36 Pages) IDT

Part #	ADC1113S125

Description	Single 11-bit ADC; serial JESD204A interface

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Manufacturer	IDT [Integrated Device Technology]

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ADC1113S125 2

Product data sheet

Rev. 02 — 2 July 2012

30 of 36

Integrated Device Technology

ADC1113S125

Single 11-bit ADC; serial JESD204A interface

Table 34.

Cfg_1_BID (address 0821h)

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7 to 4 -

-

0000

not used

3 to 0 BID[3:0]

R/W

1010

defines the bank ID – extension to DID

Table 35.

Cfg_3_SCR_L (address 0822h)

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7

SCR

R/W

0

scrambling enabled

6 to 1 -

-

000000

not used

0

L

R/W

0

defines the number of lanes per converter device, minus 1

Table 36.

Cfg_4_F (address 0823h)

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7 to 3 -

-

00000

not used

2 to 0 F[2:0]

R/W

***

defines the number of octets per frame, minus 1

Table 37.

Cfg_5_K (address 0824h)

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7 to 5 -

-

000

not used

4 to 0 K[4:0]

R/W

*****

defines the number of frames per multiframe, minus 1

Table 38.

Cfg_6_M (address 0825h)

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7 to 1 -

-

0000000

not used

0M

R/W

*

defines the number of converters per device, minus 1

Table 39.

Cfg_7_CS_N (address 0826h)

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7

-

0

not used

6

CS[0]

R/W

1

defines the number of control bits per sample, minus 1

5 to 4 -

-

00

not used

3 to 0 N[3:0]

R/W

0001

defines the converter resolution

Table 40.

Cfg_8_Np (address 0827h)

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7 to 5 -

-

000

not used

4 to 0 NP[4:0]

R/W

01111

defines the total number of bits per sample, minus 1

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