TPS62366A, TPS62366B

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SLUSAX3 – JULY 2012

THERMAL INFORMATION

TPS62366x

YZH

UNITS

16 PINS

94.8

25

60

°C/W

3.2

57

n/a

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

from the simulation data for obtaining

(6)

The junction-to-board characterization parameter,

from the simulation data for obtaining

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

Spacer

RECOMMENDED OPERATING CONDITIONS

(1)

MIN

TYP

MAX

UNIT

2.5

5.5

Input voltage range, VIN

V

2.8

5.5

2.5

A

Rising and falling signal transition time at EN, VSEL

30

mV/µs

–40

85

°C

Operating junction temperature

–40

150

°C

(1)

Refer to the APPLICATION INFORMATION section for further information.

(2)

In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

in the application (

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