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PT5520 Series

1.5-A 5-V/3.3-V Input Adjustable

Integrated Switching Regulator

PT5520 SERIES

Characteristics

Symbols

Conditions

Min

Typ

Max

Units

Output Current

—

1.5

A

Input Voltage Range

—

5.5

V

5.5

Set-Point Voltage Tolerance

—

—

±2

Temperature Variation

—

±0.5

—

Line Regulation

—

—

±6

mV

Load Regulation

—

—

±10

mV

Total Output Variation

Includes set-point, line, load,

——±3

–40°C

Efficiency

η

PT5521

—

89

—

PT5522

—

86

—

PT5523

—

84

—

PT5524

—

83

—

%

PT5525

—

81

—

PT5526

—

79

—

PT5527

—

76

—

20MHz bandwidth

—

15

30

mV

Transient Response

—

50

—

µSec

—

50

100

mV

Current Limit

—4

—A

Switching Frequency

—

—

kHz

Inhibit Control (pin1)

Input High Voltage

Referenced to GND (pin3)

—

V

Input Low Voltage

–0.2

—

0.5

Input Low Current

Pin 1 to GND

—

–0.5

—

mA

External Capacitance

——µF

Absolute Maximum

—

°C

Operating Temperature Range

Storage Temperature

—

-40

—

+125

°C

Mechanical Shock

Per Mil-STD-883D, Method 2002.3 , 1 msec,

—

500

—

G’s

Half Sine, mounted to a fixture

Mechanical Vibration

Per Mil-STD-883D, Method 2007.2,

20-2000 Hz, Soldered in a PC board

—

—G’s

Weight

—

—

—

6.5

—

grams

Flammability

—

Materials meet UL 94V-0

Notes: (1) The ISR will operate down to no load with reduced specifications.

(2) This is a typical value only. The switching frequency will vary with input voltage.

(3) The Inhibit control (pin 1) has an internal pull-up, and if left open-circuit the module will operate when input power is applied. A small low-leakage

(<100nA) MOSFET is recommended to control this input. Ensure an On/Off transition time of

≤10µs. See application notes for more information.

(4) The PT5520 Series requires a 100µF electrolytic or tantalum output capacitor for proper operation in all applications.

(6) See SOA curves or consult factory for the appropriate derating.

(7) The case pins on the through-hole package types (suffixes N & A) must be soldered. For more information see the applicable package outline drawing.