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TPS51275C Datasheet(PDF) 11 Page - Texas Instruments |
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TPS51275C Datasheet(HTML) 11 Page - Texas Instruments |
11 / 28 page = £ p ´ ´ SW 0 OUT f 1 f 2 ESR C 4 R1 R2 Voltage Divider + VFB + VREF PWM Control Logic and Divider L ESR COUT VC RLOAD IIND IOUT UDG-12111 IC Switching Modulator Output Capacitor VOUT TPS51275 TPS51275C VIN DRVH DRVL TPS51275, TPS51275C www.ti.com SLUSB45 – JUNE 2012 D-CAP™ Mode From small-signal loop analysis, a buck converter using D-CAP™ mode can be simplified as shown in Figure 1. Figure 1. Simplifying the Modulator The output voltage is compared with internal reference voltage after divider resistors, R1 and R2. The PWM comparator determines the timing to turn onthe high-side MOSFET. The gain and speed of the comparator is high enough to keep the voltage at the beginning of each ON cycle substantially constant. For the loop stability, the 0dB frequency, ƒ0, defined in Equation 2 must be lower than 1/4 of the switching frequency. (2) As ƒ0 is determined solely by the output capacitor characteristics, the loop stability during D-CAP™ mode is determined by the capacitor chemistry. For example, specialty polymer capacitors have output capacitance in the order of several hundred micro-Farads and ESR in range of 10 milli-ohms. These yield an f0 value on the order of 100 kHz or less and the loop is stable. However, ceramic capacitors have ƒ0 at more than 700 kHz, which is not suitable for this operational mode. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 11 |
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