Electronic Components Datasheet Search |
|
SM65MLVD047ADR Datasheet(PDF) 2 Page - Texas Instruments |
|
SM65MLVD047ADR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 21 page SN65MLVD047A SLLS736A − JULY 2006 − REVISED MAY 2008 www.ti.com 2 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PART NUMBER PACKAGE MARKING PACKAGE/CARRIER SN65MLVD047AD MLVD047A 16-Pin SOIC/Tube SM65MLVD047ADR MLVD047A 16-Pin SOIC/Tape and Reel SN65MLVD047APW BUL 16-Pin TSSOP/Tube SM65MLVD047APWR BUL 16-Pin TSSOP/Tape and Reel NOTE: For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. PACKAGE DISSIPATION RATINGS PACKAGE PCB JEDEC STANDARD TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C(1) TA = 85°C POWER RATING D(16) Low-K(2) 898 mW 7.81 mW/ _C 429 mW PW(16) Low-K(2) 592 mW 5.15 mW/ _C 283 mw PW(16) High-K(3) 945 mW 8.22 mW/ _C 452 mw (1) This is the inverse of the junction-to-ambient thermal resistance when board mounted and with no air flow. (2) In accordance with the Low-K thermal metric difinitions of EIA/JESD51−3. (3) In accordance with the High-K thermal metric difinitions of EIA/JESD51−7. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) UNITS Supply voltage range(2), VCC −0.5 V to 4 V Input voltage range, VI A, EN, EN −0.5 V to 4 V Output voltage range, VO Y, Z −1.8 V to 4 V Human Body Model(3) Y and Z ±9 kV Electrostatic discharge Human Body Model(3) All pins ±4 kV Electrostatic discharge Charged-Device Model(4) All pins ±1500 V Machine Model(5) All pins 200 V Junction temperature, TJ 140 °C (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential I/O bus voltages, are with respect to the circuit ground terminal. (3) Tested in accordance with JEDEC Standard 22, Test Method A114−B. (4) Tested in accordance with JEDEC Standard 22, Test Method C101−A. (5) Tested in accordance with JEDEC Standard 22, Test Method A115−A. |
Similar Part No. - SM65MLVD047ADR |
|
Similar Description - SM65MLVD047ADR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |