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SN75LVDS84ADGGR Datasheet(PDF) 7 Page - Texas Instruments |
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SN75LVDS84ADGGR Datasheet(HTML) 7 Page - Texas Instruments |
7 / 17 page SN75LVDS84A, SN65LVDS84AQ FLATLINK TRANSMITTER SLLS354E – MAY 1999 – REVISED JANUARY 2001 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CL = 10 pF Max (2 Places) 49.9 Ω ± 1% (2 Places) VOC VOD YP YM VOD(H) VOC(SS) VOC(SS) VOD(L) 100% 80% 20% 0% 0 V VOC(PP) tr tf 0 V (a) SCHEMATIC (b) WAVEFORMS NOTE A: The lumped instrumentation capacitance for any single-ended voltage measurement is less than or equal to 10 pF. When making measurements at YP or YM, the complementary output is similarly loaded. Figure 3. Test Load and Voltage Definitions for LVDS Outputs |
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