Electronic Components Datasheet Search |
|
SN65HVDA1040A-Q1 Datasheet(PDF) 6 Page - Texas Instruments |
|
|
SN65HVDA1040A-Q1 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 24 page 2 GND SN65HVDA1040A CANL 6 CANH 7 SPLIT 5 3 V = ½V in normal mode, floating in other modes SPLIT CC V CC SN65HVDA1040A-Q1 SLLS995C – FEBRUARY 2010 – REVISED FEBRUARY 2011 www.ti.com Application Hints Using With 3.3-V Microcontrollers The input level threshold for the digital input pins of this device are 3.3V compatible, however a few application considerations must be taken if using this device with 3.3-V microcontrollers. Both TXD and STB input pins have internal pull up sources to VCC. Some microcontroller vendors recommend using an open drain configuration on their I/O pins in this case even though the pullup limits the current. As such care must be taken at the application level that TXD and STB have sufficient pull up to meet system timing requirements for CAN. The internal pullup on TXD especially may not be sufficient to overcome the parasitic capacitances and allow for adequate CAN timing; thus, an additional external pullup may be required. Care should also be taken with the RXD pin of the microcontroller as this device 's RXD output drives the full VCC range (5 V). If the microcontroller RXD input pin is not 5-V tolerant, this must be addressed at the application level. Other options include using a CAN transceiver from Texas Instruments with I/O level adapting or a 3.3-V CAN transceiver. Using SPLIT With Split Termination The SPLIT pin voltage output provides 0.5 × VCC in normal mode. The circuit may be used by the application to stabilized the common-mode voltage of the bus by connecting it to the center tap of split termination for the CAN network (see Figure 17 and Figure 4). This pin provides a stabilizing recessive voltage drive to offset leakage currents of un-powered transceivers or other bias imbalances that might bring the network common mode voltage away from 0.5 × VCC. Utilizing this feature in a CAN network improves electromagnetic emissions behavior of the network by eliminating fluctuations in the bus common mode voltage levels at the start of message transmissions. Figure 4. Split Pin Stabilization Circuitry and Application PCB and Thermal Considerations for VSON Package The VSON package verson of this device has an exposed thermal pad which should be connected with vias to a thermal plane. Even though this pad is not electrically connected internally it is recommended that the exposed pad be connected to the GND plane. Please refer to the mechanical information on the package at the end of this datasheet and application report SLUA271 "QFN/SON PCB Attachement" for more information on proper use of this package. 6 Submit Documentation Feedback © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): SN65HVDA1040A-Q1 |
Similar Part No. - SN65HVDA1040A-Q1 |
|
Similar Description - SN65HVDA1040A-Q1 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |