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SN65HVD1050MDREPG4 Datasheet(PDF) 9 Page - Texas Instruments |
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SN65HVD1050MDREPG4 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 21 page  + _ DUT TXD S RXD 15 pF +20% VO VI 0 V CL 60 W +1% CANH CANL NOTE: CL = 100 pF includes instrumentation and fixture capacitance within ±20% 50 % 50 % ten VCC 0 V VOH VOL VI VO NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, Pulse Repetition Rate (PRR) = 25 kHz, 50% duty cycle CANH CANL TXD S VI 47 nF +20% 27 W +1% 27 W +1% VOC = VO(CANH) + VO(CANL) 2 DVOC(SS) VOC + _ DUT TXD S RXD VI CL CANH CANL NOTE:CL =100pF includesinstrumentation andfixturecapacitance within ±20% VO 50% 50% 50% VCC 0V VOH VOL TXDInput RXDOutput tloop2 tloop1 15pF±20% 60 ±1% W SN65HVD1050-EP www.ti.com SLLS772A – DECEMBER 2006 – REVISED OCTOBER 2009 Figure 7. ten Test Circuit and Waveforms NOTE: All VI input pulses are from 0 V to VCC and supplied by a generator having the following characteristics: tr or tf ≤ 6 ns. Pulse Repetition Rate (PRR) = 125 kHz, 50% duty cycle. Figure 8. Common-Mode Output Voltage Test and Waveform A. All VI input pulses are from 0 V to VCC and supplied by a generator having the following characteristics: tr or tf ≤ 6 ns. Pulse Repetition Rate (PRR) = 125 kHz, 50% duty cycle. Figure 9. t(LOOP) Test Circuit and Waveform Copyright © 2006–2009, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s) :SN65HVD1050-EP |
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