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SN65HVD11-HT Datasheet(PDF) 5 Page - Texas Instruments |
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SN65HVD11-HT Datasheet(HTML) 5 Page - Texas Instruments |
5 / 30 page SN65HVD11-HT www.ti.com SLLS934E – NOVEMBER 2008 – REVISED JUNE 2012 THERMAL CHARACTERISTICS FOR JD PACKAGE over operating free-air temperature range unless otherwise noted (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT High-K board(3), No airflow JD pkg 64.9 Junction-to-ambient thermal θJA °C/W resistance(2) No airflow JD pkg 83.4 Junction-to-board thermal θJB High-K board without underfill JD pkg 27.9 °C/W resistance Junction-to-case thermal θJC JD pkg 6.49 °C/W resistance RL= 60 Ω, CL = 50 pF, DE = VCC, RE = 0 V, HVD11 PD Device power dissipation 165 mW Input to D a 50% duty cycle square (10 Mbps) wave at indicated signaling rate (1) See Application Information section for an explanation of these parameters. (2) The intent of θJA specification is solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and will not predict the performance of a package in an application-specific environment. (3) JED51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages THERMAL CHARACTERISTICS FOR HKJ OR HKQ PACKAGE over operating free-air temperature range (unless otherwise noted) PARAMETER MIN TYP MAX UNIT to ceramic side of case 5.7 θJC Junction-to-case thermal resistance °C/W to top of case lid (metal side of case) 13.7 RECOMMENDED OPERATING CONDITIONS TA = –55°C to 125°C TA = 175°C TA = 210°C UNIT MIN NOM MAX MIN NOM MAX MIN NOM MAX VCC Supply voltage 3 3.6 3 3.6 3 3.6 V VI or Voltage at any bus terminal (separately or common mode) -7(1) 12 -7(1) 12 -7(1) 12 V VIC VIH High-level input voltage D, DE, RE 2 VCC 2 VCC 2 VCC V VIL Low-level input voltage D, DE, RE 0 0.8 0 0.8 0 0.8 V VID Differential input voltage Figure 8 -12 12 -12 12 -12 12 V Driver -60 -60 -60 IOH High-level output current mA Receiver -8 -8 -8 Driver 60 60 60 IOL Low-level output current mA Receiver 8 8 8 RL Differential load resistance 54 60 54 60 54 60 Ω CL Differential load capacitance 50 50 50 pF Signaling rate 10 10 10 Mbps TJ (2) Operating junction temperature 129 179 214 °C (1) The algebraic convention, in which the least-positive (most-negative) limit is designated as minimum, is used in this data sheet. (2) See Thermal Characteristics table for information regarding this specification. Copyright © 2008–2012, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): SN65HVD11-HT |
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