 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SN65HVD251D Datasheet(PDF) 5 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
SN65HVD251D Datasheet(HTML) 5 Page - Texas Instruments |
|
|
5 / 27 page  SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 RECEIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIT+ Positive-going input threshold voltage 750 900 VIT- Negative-going input threshold voltage Rs at 0 V, (See Table 1) 500 650 mV Vhys Hysteresis voltage (VIT+ - VIT-) 100 VOH High-level output voltage Figure 6, IO = -4mA 0.8 VCC V VOL Low-level output voltage Figure 6, IO = 4mA 0.2 VCC V CANH or CANL at 12 V 600 CANH or CANL at 12 V, Other bus 715 VCC at 0 V pin at 0 V, II Bus input current µA Rs at 0 V, D CANH or CANL at -7 V -460 at 0.7 VCC CANH or CANL at -7 V, -340 VCC at 0 V Pin-to-ground, VI = 0.4 sin (4E6pt) + 0.5 pF CI Input capacitance, (CANH or CANL) 20 V, D at 0.7 VCC Pin-to-pin, VI = 0.4 sin (4E6pt) + 0.5 V, D pF CID Differential input capacitance 10 at 0.7 VCC RID Differential input resistance D at 0.7 VCC, Rs at 0 V 40 100 k Ω RIN Input resistance, (CANH or CANL) D at 0.7 VCC, Rs at 0 V 20 50 k Ω Receiver noise rejection See Figure 13 RECEIVER SWITCHING CHARACTERISTICS over recommended operating conditions (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tpLH Propagation delay time, low-to-high-level output 35 50 tpHL Propagation delay time, high-to-low-level output 35 50 tsk(p) Pulse skew (|tpHL - tpLH|) Figure 6 20 ns tr Output signal rise time 2 4 tf Output signal fall time 2 4 tp(sb) Propagation delay time in standby Figure 12, Rs at VCC 500 VREF-PIN CHARACTERISTICS over recommended operating conditions (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT -5 µA < IO < 5 µA 0.45 VCC 0.55 VCC VO Reference output voltage V -50 µA < IO < 50 µA 0.4 VCC 0.6 VCC DEVICE SWITCHING CHARACTERISTICS over recommended operating conditions (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Figure 10, Rs at 0 V 60 100 Total loop delay, driver input to receiver tloop1 Figure 10, Rs with 10 k Ω to ground 100 150 ns output, recessive to dominant Figure 10, Rs with 100 k Ω to ground 440 800 Figure 10, Rs at 0 V 115 150 Total loop delay, driver input to receiver tloop2 Figure 10, Rs with 10 k Ω to ground 235 290 ns output, dominant to recessive Figure 10, Rs with 100 k Ω to ground 1070 1450 Total loop delay, driver input to receiver tloop2 Figure 10, Rs at 0 V, VCC from 4.5 V to 5.1 V, 105 145 ns output, dominant to recessive Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): SN55HVD251 SN65HVD251 |
Similar Part No. - SN65HVD251D |
|
Similar Description - SN65HVD251D |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
