PCM2902B PIN ASSIGNMENTS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

D+

D–

V

BUS

DGNDU

HID0

HID1

HID2

SEL0

SEL1

V

CCCI

AGNDC

V

L

IN

V

R

IN

V

COM

SSPND

DIN

V

CCXI

AGNDX

XTO

V

CCP2I

DGND

V

CCP1I

V

L

OUT

XTI

DOUT

V

DDI

AGNDP

V

R

OUT

PCM2902B

PCM2900B

PCM2902B

DB PACKAGE

SSOP-28

(TOP VIEW)

Table 2. PCM2902B TERMINAL FUNCTIONS

TERMINAL

NAME

NO.

I/O

DESCRIPTION

AGNDC

11

–

Analog ground for codec

AGNDP

18

–

Analog ground for PLL

AGNDX

22

–

Analog ground for oscillator

D–

2

I/O

D+

1

I/O

DGND

26

–

Digital ground

DGNDU

4

–

Digital ground for USB transceiver

DIN

24

I

DOUT

25

O

S/PDIF output

HID0

5

I

HID1

6

I

HID2

7

I

SEL0

8

I

SEL1

9

I

SSPND

28

O

Suspend flag, active-low (Low: suspend, High: operational)

3

–

10

–

17

–

19

–

23

–

14

–

(5)

27

–

Internal digital power supply

12

I

ADC analog input for L-channel

13

I

ADC analog input for R-channel

16

O

DAC analog output for L-channel

15

O

DAC analog output for R-channel

XTI

21

I

XTO

20

O

Crystal oscillator output

(1)

LV-TTL level.

(2)

3.3-V CMOS-level input with internal pulldown, 5-V tolerant.

(3)

3.3-V CMOS-level input with internal pulldown. This pin informs the PC of serviceable control signals such as mute, volume up, or

volume down, which have no connection with the internal DAC or ADC directly. See the Interface #3 and End-Points sections.

(4)

TTL Schmitt trigger, 5-V tolerant.

(5)

Connect a decoupling capacitor to GND.

(6)

3.3-V CMOS-level input.

Copyright © 2008, Texas Instruments Incorporated

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Not Recommended For New Designs