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TL16PNP200A Datasheet(PDF) 3 Page - Texas Instruments |
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TL16PNP200A Datasheet(HTML) 3 Page - Texas Instruments |
3 / 10 page TL16PNP200A STANDALONE PLUG-AND-PLAY (PnP) CONTROLLER SLLS274A– APRIL1997 – REVISED MAY 1997 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram EEPROM Controller 64 63 62 65 69 8 SCS SCLK SIO PNP_BUSY SROM_BUSY Logical Device Control Card Control Logical Device Configuration 8 8 8 8 8 Output Enable Address Register 8 8 LFSR Key Select 8 Decoder Read-Data Port Write-Data Port Address Port Logical Device Decoder Enable 66, 67 70,71 (7–9),72, 73 77, 78 (2), 76–75 80, 79 60–50 40 (3, 4), 47–49 (5, 6), 43–45 11–26, 2–9 40 80 38 39 41 28–31, 33–36 D7–D0 MCS1† (IOCS2), MCS0† (IOCS3) (INTR4–INTR2), INTR1, INTR0 DMA_RQ1, DMA_RQ0 DMA_ACK1, DMA_ACK0 (IOCS4), IOCS1, IOCS0 (OEN1), OEN0 IRQ3–IRQ7, IRQ9–IRQ12, IRQ14–IRQ15 (CDRQ4, CDRQ3), CDRQ2–CDRQ0 (CDACK4–CDACK3), CDACK2–CDACK0 A23–A16†, A15–A0 AEN BALE† IOR IOW RESET 11–26, 2–9 † Designates terminals for mode 0 only. NOTE A: Terminals in parentheses are for mode 1 operation only. |
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