© 2011 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN5401X Family • Rev. 1.0.2

32

Register Descriptions

FAN54010-FAN54012 have seven user-accessible registers; FAN54013-FAN54015 have an additional two registers, defined

in Table 22.

Table 22. I

IC

Register

Address Bits

Name

REG#

7

6

5

4

3

2

1

0

ALL

CONTROL0

0

0

0

0

0

0

0

0

0

CONTROL1

1

0

0

0

0

0

0

0

1

OREG

2

0

0

0

0

0

0

1

0

IC_INFO

03

or

3BH

0

0

0

0

0

0

1

1

IBAT

4

0

0

0

0

0

1

0

0

FAN54013-15

SP_CHARGER

5

0

0

0

0

0

1

0

1

SAFETY

6

0

0

0

0

0

1

1

0

ALL

MONITOR

10H

0

0

0

0

1

0

1

0

Table 23. Register Bit Definitions

This table defines the operation of each register bit for all IC versions. Default values are in bold text.

Bit

Name

Value

Type

Description

CONTROL0

Register Address: 00

Default Value=X1XX 0XXX

7

TMR_RST

OTG

1

W

R

Returns the OTG pin level (1=HIGH)

6

EN_STAT

0

R/W

Prevents STAT pin from going LOW during charging; STAT pin still pulses to

enunciate faults

1

Enables STAT pin LOW when IC is charging

5:4

STAT

00

R

Ready

01

Charge in progress

10

Charge done

11

Fault

3

BOOST

0

R

IC is not in Boost Mode

1

IC is in Boost Mode

2:0

FAULT

R

Fault status bits: for Charge Mode, see Table 13; for Boost Mode, see Table 18