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SRC4190-Q1 Datasheet(PDF) 25 Page - Texas Instruments

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Part No. SRC4190-Q1
Description  192-kHz STEREO ASYNCHRONOUS SAMPLE-RATE CONVERTER
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo TI1 - Texas Instruments

SRC4190-Q1 Datasheet(HTML) 25 Page - Texas Instruments

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LRCKO
BCKO
SDOUT
N = Number of Daisy-Chained Devices
One Sub-Frame contains 64 bits, with 32 bits per channel.
For each channel, the audio data is Left Justified, MSB first format, with the word length determined by the OWL[1:0] pins/bits .
Left
Right
Sub-Frame 1
Sub-Frame 2
Sub-Frame N
One Frame = 1/f
s
Left
Right
Left
Right
t
LROS
t
TDMS
t
LROH
t
TDMH
LRCKO
BCKO
TDMI
SRC4190-Q1
www.ti.com
SBFS034A – SEPTEMBER 2008 – REVISED OCTOBER 2009
Figure 11. TDM Frame Format
Figure 12. TDM Input Timing
The frame rate is equal to the output sampling frequency, fS. The BCKO frequency for the TDM interface is N ×
64fS, where N is the number of devices included in the daisy chain. For Master mode, the output BCKO
frequency is fixed to the reference clock (RCKI) input frequency. The number of devices that can be
daisy-chained in TDM mode is dependent upon the output sampling frequency and the BCKO frequency, leading
to the following numerical relationship:
Number of daisy-chained devices = (fBCKO / fS) / 64
Where:
fBCKO = Output port bit clock (BCKO), 27.136 MHz maximum
fS = Output port sampling (or LRCKO) frequency, 212 kHz maximum
This relationship holds true for both slave and master modes.
Figure 13 and Figure 14 show typical connection schemes for the TDM mode. Although the TMS320C671x DSP
family is shown as the audio processing engine in these figures, other TI digital signal processors with a
multi-channel buffered serial port (McBSPTM) may also function with this arrangement. Interfacing to processors
from other manufacturers is also possible. See Figure 7 in this data sheet, along with the equivalent serial port
timing diagrams shown in the DSP data sheet, to determine compatibility.
Copyright © 2008–2009, Texas Instruments Incorporated
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