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SN75C091A Datasheet(PDF) 41 Page - Texas Instruments

Part # SN75C091A
Description  SCSI Bus Controller
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN75C091A Datasheet(HTML) 41 Page - Texas Instruments

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SELECT-WITH-ATN-AND-TRANSFER COMMAND STATE CODES AND INTERRUPTS (Continued)
COMMAND
STATE CODE
(HEX)
LAST
SUCCESSFUL
PHASE
BIT(S)
SET TO
1
REGISTER
CAUSE
3
Start of CDB transfer
BUS,
HALT
FISR, EISR
Command phase wrong length.
4
CDB transfer
complete
BUS
FOSR
No status, data, or message-in phases. If status,
TC > 0. If data, I/O did not match DDIR or TC = 0.
If message in, message was not SDP or
disconnect.
HALT
EISR
Pause command halted chip command.
5
Data tramsfer started
BUS
FISR
No status, data, or message-in phases. If status,
TC > 0. If data, I/O did not match DDIR or TC = 0.
If message in, message was not SDP.
5
Data tramsfer started
or continued
PE,
HALT
EISR, EISR
Parity error during data transfer.
HALT
EISR
Pause command halted data transfer.
6
Save data pointer
message received
(SDP bit is set to 1 in
BUS
FISR
No data or message-in phases. If data, I/O did not
match DDIR. If message in, message was not
disconnect.
(
bus phase register)
HALT
EISR
Pause command halt.
7
Disconnect message
received
BUS
FISR
Any new bus information phase.
SEL
FISR
Chip selected as target.‡
8
Target disconnected
RSL
FISR
If DIS, then any target reselected. Otherwise, a
new target reselected.‡
8
Target disconnected
DIS
FISR
Target disconnected with HD set to 1 in control
register.‡
HALT
EISR
Pause command halt.
9
Original target
reselected
BUS
FISR
No message-in phase, or if message in, message
was not ID.
reselected
NEWLN
EISR
New LUN reconnected.‡
A
Correct ID message
received
BUS
FISR
No status, data, or message-in phase. If status,
TC > 0. If data, I/O did not match DDIR or TC = 0.
If message in, message was not RP.
B
Data transfer
completed (TC = 0)
(subset of Code 5)
BUS
FISR
No status or message-in phase. If message in,
message was not SDP.
C
Status byte received
BUS
FISR
No message-in phase, or if message in, message
was not CC, LCC, or LCCwF.
† Following these events, a Clear Transmit FIFO command should be issued to clear the unsent SCSI command bytes
from the transmit FIFO.
‡ Following these events, a Clear Transmit FIFO command should be issued to clear the unsent data bytes from the
transmit FIFO to prepare the SBC for a transaction with a different logical thread. The transfer counter and/or backup
counter register values can be used to update SCSI data pointers so that bytes that were left in the FIFO can be resent
later.


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