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SN75ALS1711 Datasheet(PDF) 4 Page - Texas Instruments |
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SN75ALS1711 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 10 page SN75ALS1711 TRIPLE DIFFERENTIAL BUS TRANSCEIVER SLLS117B – APRIL 1991 – REVISED MAY 1995 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK Input clamp voltage II = – 18 mA – 1.5 V VO Output voltage IO = 0 0 6 V VOD1 Differential output voltage IO = 0 1.5 5 V VOD2 Differential output voltage RL = 54 Ω, See Figure 1 1.5 5 V VOD3 Differential output voltage See Note 3 and Figure 2 1.5 5 V ∆|VOD| Change in magnitude of differential output voltage‡ RL = 54 Ω, See Figure 1 ±0.2 V VOC Common-mode output voltage RL = 54 Ω, See Figure 1 3 –1 V ∆|VOC| Change in magnitude of common-mode output voltage‡ RL = 54 Ω, See Figure 1 ±0.2 V IOZ High impedance state output current Output disabled, VO = 12 V 1 mA IOZ High-impedance state output current , VCC = 5.25 V VO = 7 V – 0.8 mA IIH High-level input current, DE, EN, CDE VIH = 2.4 V 20 µA IIL Low-level input current, DE, EN, CDE VIL = 0.4 V – 200 µA IOS Short circuit output current VO = 12 V – 250 mA IOS Short-circuit output current VO = 7 V 250 mA ICC Supply current No load Outputs enabled 48 72 mA ICC Supply current No load Outputs disabled 30 48 mA † All typical values are at VCC = 5 V and TA = 25°C. ‡ ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. NOTE 3: This applies for both power on and off; refer to ANSI Standard RS-485 for exact conditions. switching characteristics, VCC = 5 V ± 5%, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Differential propagation delay time, low- to high-level output RL = 54 Ω, CL = 100 pF, 8 13 22 ns tPHL Differential propagation delay time, high- to low-level output L , See Figure 3 L , 8 15 22 ns tPZH Output enable time to high level S1 open, 30 50 60 tPHZ Output disable time from high level RL = 110 Ω, , S2 closed 4 16 30 ns tPZL Output enable time to low level L See Figure 4 S1 closed, 16 26 45 ns tPLZ Output disable time from low level S2 open 4 8 20 |
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