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MF10ACN Datasheet(PDF) 21 Page  Texas Instruments 

MF10ACN Datasheet(HTML) 21 Page  Texas Instruments 
21 / 30 page 3.0 Applications Information The MF10 is a generalpurpose dual secondorder state variable filter whose center frequency is proportional to the frequency of the square wave applied to the clock input (f CLK). By connecting pin 12 to the appropriate DC voltage, the filter center frequency f O can be made equal to either f CLK/100 or fCLK/50. fO can be very accurately set (within ±6%) by using a crystal clock oscillator, or can be easily varied over a wide frequency range by adjusting the clock frequency. If desired, the f CLK/fO ratio can be altered by external resistors as in Figures 9, 10, 11, 13, 14, 15. The filter Q and gain are determined by external resistors. All of the five secondorder filter types can be built using either section of the MF10. These are illustrated in Figure 1 through Figure 5 along with their transfer functions and some related equations. Figure 6 shows the effect of Q on the shapes of these curves. When filter orders greater than two are desired, two or more MF10 sections can be cascaded. 3.1 DESIGN EXAMPLE In order to design a secondorder filter section using the MF10, we must define the necessary values of three param eters: f 0, the filter section’s center frequency; H0, the pass band gain; and the filter’s Q. These are determined by the characteristics required of the filter being designed. As an example, let’s assume that a system requires a fourthorder Chebyshev lowpass filter with 1 dB ripple, unity gain at DC, and 1000 Hz cutoff frequency. As the system order is four, it is realizable using both secondorder sections of an MF10. Many filter design texts include tables that list the characteristics (f O and Q) of each of the secondorder filter sections needed to synthesize a given higherorder filter. For the Chebyshev filter defined above, such a table yields the following characteristics: f 0A = 529 Hz QA = 0.785 f 0B = 993 Hz QB = 3.559 For unity gain at DC, we also specify: H 0A =1 H 0B =1 The desired clocktocutofffrequency ratio for the overall filter of this example is 100 and a 100 kHz clock signal is available. Note that the required center frequencies for the two secondorder sections will not be obtainable with clocktocenterfrequency ratios of 50 or 100. It will be nec essary to adjust externally. From Table 1, we see that Mode 3 can be used to produce a lowpass filter with resistoradjustable center fre quency. In most filter designs involving multiple secondorder stages, it is best to place the stages with lower Q values ahead of stages with higher Q, especially when the higher Q is greater than 0.707. This is due to the higher relative gain at the center frequency of a higherQ stage. Placing a stage with lower Q ahead of a higherQ stage will provide some attenu ation at the center frequency and thus help avoid clipping of signals near this frequency. For this example, stage A has the lower Q (0.785) so it will be placed ahead of the other stage. For the first section, we begin the design by choosing a convenient value for the input resistance: R 1A = 20k. The absolute value of the passband gain H OLPA is made equal to 1 by choosing R 4A such that: R4A =−HOLPAR1A =R1A = 20k. If the 50/100/CL pin is connected to midsupply for nominal 100:1 clocktocenterfrequency ratio, we find R 2A by: The resistors for the second section are found in a similar fashion: The complete circuit is shown in Figure 16 for split ±5V power supplies. Supply bypass capacitors are highly recommended. www.national.com 20 
