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SL74HCT240 Datasheet(PDF) 4 Page - System Logic Semiconductor

Part No. SL74HCT240
Description  Octal 3-State Inverting Buffer/Line Driver/Line Receiver(High-Performance Silicon-Gate CMOS)
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Manufacturer  SLS [System Logic Semiconductor]
Direct Link  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL74HCT240 Datasheet(HTML) 4 Page - System Logic Semiconductor

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SL74HCT240
System Logic
Semiconductor
SLS
AC ELECTRICAL CHARACTERISTICS(V
CC=5.0 V
± 10%, C
L=50pF,Input t r=tf=6.0 ns)
Guaranteed Limit
Symbol
Parameter
25
°C to
-55
°C
≤85°C
≤125°C
Unit
tPLH, tPHL
Maximum Propagation Delay, A to YA or B to YB
(Figures 1 and 3)
20
25
30
ns
tPLZ, tPHZ
Maximum Propagation Delay, Output Enable to
YA or YB (Figures 2 and 4)
28
35
42
ns
tPZH, tPZL
Maximum Propagation Delay, Output Enable to
YA or YB (Figures 2 and 4)
25
31
38
ns
tTLH, tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
12
15
18
ns
CIN
Maximum Input Capacitance
10
10
10
pF
COUT
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
15
15
15
pF
Power Dissipation Capacitance (Per Enable
Output)
Typical @25
°C,V
CC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
PD=CPDVCC
2f+I
CCVCC
55
pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms


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