CDCM7005-SP datasheet(15/41 Pages) TI1

Part #	CDCM7005-SP

Description	3.3-V HIGH PERFORMANCE RAD-TOLERANT CLASS V, CLOCK SYNCHRONIZER AND JITTER CLEANER

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Manufacturer	TI1 [Texas Instruments]

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YxA

YxB

YxA

YxB

VCXO_IN

/VCXO_IN

YxA

LVPECL

LVCMOS

YxA/B

VCXO_IN

/VCXO_IN

LVCMOS

YxA/B

LVPECL

LVCMOS

tpd(LH) / tpd(HL); tsk(p) = | tpd(HL) − tpd(LH) |

LVPECL

tsk(o)LVPECL

tskp_c

tpd(LH); tsk(p) = | tpd(HL) − tpd(LH) |

tsk(o)LVCMOS

CDCM7005-SP

www.ti.com

SGLS390E – JULY 2009 – REVISED AUGUST 2012

PARAMETER MEASUREMENT INFORMATION (continued)

A.

Output skew, tsk(o), is calculated as the greater of:

The difference between the fastest and the slowest tpd(LH)n (n = 0...4)

The difference between the fastest and the slowest tpd(HL)n (n = 0...4)

B.

Pluse skew, tsk(p), is calculated as the magnitude of the absolute time difference between the high-to-low (tpd(HL)) and

the low-to-high (tpd(LH)) propagation delays when a single switching input causes one or more outputs to switch,

tsk(p) = |tpd(HL) – tpd(LH) |. Pulse skew is sometimes refered to as pulse width distortion or duty cycle skew.

Figure 12. Output Skew

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