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CDC209-7 Datasheet(PDF) 6 Page - Texas Instruments |
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CDC209-7 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 11 page CDC209, CDC209–7 DUAL 1-LINE TO 4-LINE CLOCK DRIVERS WITH 3-STATE OUTPUTS SCAS108D – MARCH 1990 – REVISED MAY 1997 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics, VCC = 5 V ± 0.25 V, TA = 25°C to 70°C (see Note 3 and Figures 1 and 2) PARAMETER FROM TO CDC209 CDC209-7 UNIT PARAMETER (INPUT) (OUTPUT) MIN MAX MIN MAX UNIT tPLH Propagation delay time, low-to-high level 1A and 2A Any Y 6 8.5 6 8.5 ns tPHL Propagation delay time, high-to-low level 1A and 2A Any Y 6 9.3 6 9.3 ns tsk(o) output skew time 1A and 2A Any Y 1 0.7 ns NOTE 3: All specifications are valid only for all outputs switching simultaneously and in phase. operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT C d Power dissipation capacitance per bank Outputs enabled CL =50 pF f=1MHz 95 pF Cpd Power dissipation capacitance per bank Outputs disabled CL = 50 pF, f = 1 MHz 10 pF PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT FOR OUTPUTS S1 2 × VCC Open GND 500 Ω 500 Ω TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 × VCC GND Output Control (low-level enabling) Output Waveform 1 S1 at 2 × VCC (see Note C) Output Waveform 2 S1 at GND (see Note C) VOL VOH tPZL tPZH tPLZ tPHZ 50% 50% ≈ VCC 0 V 50% VCC 0 V VCC 50% VCC 20% VCC 80% VCC tPLH tPHL 50% 50% 0 V 50% VCC 50% VCC VOH VOL Input (see Note B) Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VCC NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. Figure 1. Load Circuit and Voltage Waveforms |
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