Analog Integrated Circuit Device Data

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Freescale Semiconductor

27

33814

5.1.23 Controls for the VRSN and VRSP Inputs

The VRS can be connected to the 33814 in either a differential or single-ended fashion. The use of differential filtering capacitor,

and grounded capacitors of at least 100 nF are also advisable. In some applications, a damping resistor of approximately

5.0 kOhm directly across the pickup coil is also useful to minimize high frequency ringing.

5.1.24 GND VRSN Bit

To use the VRS inputs in a single-ended configuration the “GND VRSN” bit in the SPI Configuration register must be set to

indicate to the 33814 that this mode is being used. The VRS is then connected between the VRSP input and ground. The default

for this bit is zero (0) indicating that the differential mode is selected.

5.1.25 2.5 Volt Reference Disconnect Bit

The disconnect 2.5 Volt reference bit in the SPI VRS configuration register is used to disconnect the internal 2.5 Volt reference

signal from the VRSN and VRSP inputs, so that an external reference voltage can be employed. The default state of this bit is

zero (0), indicating that the internal 2.5 Volt reference voltage is connected to the VRSN and VRSP inputs.

5.1.26 Selecting the Input Threshold and Blanking Time

Two different SPI registers are provided to control the VRS circuit values in the manual mode. The SPI VRS configuration register

is used to set the “engine running” values for the threshold and blanking filter and the SPI VRS control register is used to provide

the “engine cranking “threshold and blanking filter values. Once the engine is running, the MCU clears the SPI VRS control

register and the 33814 will use the values found in the SPI VRS configuration register.

5.1.27 Input Comparator Threshold Values

The threshold voltage for the input comparator is produced by a 4-bit D/A converter. The control of the D/A output value is by

means of the upper four bits of the SPI VRS configuration register or the upper four bits of the SPI VRS control register. When

the contents of the SPI VRS control register contains all zeros, the binary value for the D/A threshold is taken from the value in

the SPI VRS configuration register. When the contents of the SPI VRS control register is non-zero, then the value in the upper

four bits of the SPI VRS control register is used to set the D/A output. The values outputted by this D/A, using either the SPI VRS

control register or the SPI VRS Configuration register, are listed in Table 10 in the threshold values table. The blanking one-shot

time is also set via the lower 4 bits of the SPI VRS configuration register or the SPI VRS control register using the same condition,

as described previously for the threshold D/A.

5.1.28 Blanking Time Definitions

The values for the one shot blanking, as a percentage of the last high output pulse period is shown in Table 11.

Table 11. SPI VRS Manual Configuration Register

SPI VRS Configuration/Control

Register Bits 3,2,1,0

Blanking Time in%

(of last pulse high period)

0000 (default)

0.0

0001

3.12

0010

6.25

0011

9.37

0100

12.5

0101

15.62

0110

18.75

0111

21.87