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CD74HC125QM96G4Q1 Datasheet(PDF) 2 Page - Texas Instruments |
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CD74HC125QM96G4Q1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 13 page CD74HC125-Q1 HIGH-SPEED CMOS LOGIC QUAD BUFFER WITH 3-STATE OUTPUTS SCLS579A − APRIL 2004 − REVISED SEPTEMBER 2008 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) 1 1OE 2 1A 1Y 3 4 2OE 5 2A 2Y 6 10 3OE 9 3A 3Y 8 13 4OE 12 4A 4Y 11 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC −0.5 V to 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) (see Note 1) ±20 mA . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, IOK (VO < −0.5 V or VO > VCC + 0.5 V) (see Note 1) ±20 mA . . . . . . . . . . . . . . . . . . . . . Continuous output current, IO (VO > −0.5 or VO < VCC + 0.5 V) ±35 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output source or sink current per output pin, IO (VO > −0.5 or VO < VCC + 0.5 V) ±25 mA . . . . . . . . . . . . . . . . Continuous current through VCC or GND ±70 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note 2): M package 86 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PW package 113 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg −65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) MIN NOM MAX UNIT VCC Supply voltage 2 5 6 V VCC = 2 V 1.5 VIH High-level input voltage VCC = 4.5 V 3.15 V VIH High level input voltage VCC = 6 V 4.2 V VCC = 2 V 0.5 VIL Low-level input voltage VCC = 4.5 V 1.35 V VIL Low level input voltage VCC = 6 V 1.8 V VI Input voltage 0 VCC V VO Output voltage 0 VCC V VCC = 2 V 1000 tt Input transition rise/fall time VCC = 4.5 V 500 ns tt Input transition rise/fall time VCC = 6 V 400 ns TA Operating free-air temperature −40 125 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. |
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