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CC430F6143IRGCT Datasheet(PDF) 11 Page - Texas Instruments |
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CC430F6143IRGCT Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 116 page  ECCN 5E002 TSPA - Technology / Software Publicly Available CC430F614x CC430F514x CC430F512x www.ti.com SLAS555 – JUNE 2012 Table 3. CC430F614x Terminal Functions (continued) TERMINAL I/O(1) DESCRIPTION NAME NO. General-purpose digital I/O with mappable secondary function P3.2/ PM_TA0CCR1A/ S12 22 I/O Default mapping: TA0 CCR1 compare output, capture input LCD segment output S12 General-purpose digital I/O with mappable secondary function P3.1/ PM_TA0CCR0A/ S11 23 I/O Default mapping: TA0 CCR0 compare output, capture input LCD segment output S11 General-purpose digital I/O with mappable secondary function P3.0/ PM_CBOUT0/ PM_TA0CLK/ 24 I/O Default mapping: Comparator_B output; TA0 clock input S10 LCD segment output S10 DVCC 25 Digital power supply General-purpose digital I/O P4.7/ S9 26 I/O LCD segment output S9 General-purpose digital I/O P4.6/ S8 27 I/O LCD segment output S8 General-purpose digital I/O P4.5/ S7 28 I/O LCD segment output S7 General-purpose digital I/O P4.4/ S6 29 I/O LCD segment output S6 General-purpose digital I/O P4.3/ S5 30 I/O LCD segment output S5 General-purpose digital I/O P4.2/ S4 31 I/O LCD segment output S4 General-purpose digital I/O P4.1/ S3 32 I/O LCD segment output S3 General-purpose digital I/O P4.0/ S2 33 I/O LCD segment output S2 General-purpose digital I/O P5.3/ S1 34 I/O LCD segment output S1 General-purpose digital I/O P5.2/ S0 35 I/O LCD segment output S0 RF_XIN 36 I Input terminal for RF crystal oscillator or external clock input RF_XOUT 37 O Output terminal for RF crystal oscillator AVCC_RF 38 Radio analog power supply AVCC_RF 39 Radio analog power supply RF Positive RF input to LNA in receive mode RF_P 40 I/O Positive RF output from PA in transmit mode RF Negative RF input to LNA in receive mode RF_N 41 I/O Negative RF output from PA in transmit mode AVCC_RF 42 Radio analog power supply AVCC_RF 43 Radio analog power supply RBIAS 44 External bias resistor for radio reference current GUARD 45 Power supply connection for digital noise isolation General-purpose digital I/O PJ.0/ TDO 46 I/O Test data output port General-purpose digital I/O PJ.1/ TDI/ TCLK 47 I/O Test data input or test clock input General-purpose digital I/O PJ.2/ TMS 48 I/O Test mode select General-purpose digital I/O PJ.3/ TCK 49 I/O Test clock Test mode pin - select digital I/O on JTAG pins TEST/ SBWTCK 50 I Spy-bi-wire input clock Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 11 |
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