ADS7887M datasheet(4/17 Pages) TI1

Part #	ADS7887M

Description	10-BIT 1.25-MSPS MICRO-POWER MINIATURE SAR ANALOG-TO-DIGITAL CONVERTER

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Manufacturer	TI1 [Texas Instruments]

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ADS7887M

SLAS750A

– JUNE 2011 – REVISED JUNE 2011

www.ti.com

ELECTRICAL SPECIFICATIONS (continued)

+VDD = 2.35 V to 5.25 V, TA = –55°C to 125°C, fsample = 1.25 MHz

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VDD = 5 V

5.5

7.5

Power dissipation in static state

mW

VDD = 3 V

3

4.5

Power down time

0.1

µs

Power up time

0.8

µs

Invalid conversions after power up

1

TEMPERATURE RANGE

Specified performance

–55

125

°C

TIMING REQUIREMENTS (see Figure 1)

All specifications typical at TA = –55°C to 125°C, VDD = 2.35 V to 5.25 V, unless otherwise specified.

PARAMETER

TEST CONDITIONS(1)

MIN

TYP

MAX

UNIT

VDD = 3 V

14

× tSCLK

tconv

Conversion time

ns

VDD = 5 V

14

× tSCLK

VDD = 3 V

40

Minimum quiet time needed from bus 3-state to start of

tq

ns

next conversion

VDD = 5 V

40

VDD = 3 V

15

25

td1

Delay time, CS low to first data (0) out

ns

VDD = 5 V

13

25

VDD = 3 V

10

tsu1

Setup time, CS low to SCLK low

ns

VDD = 5 V

10

VDD = 3 V

15

25

td2

Delay time, SCLK falling to SDO

ns

VDD = 5 V

13

25

VDD < 3 V

7

th1

Hold time, SCLK falling to data valid(2)

ns

VDD > 5 V

5.5

VDD = 3 V

10

25

td3

Delay time, 16th SCLK falling edge to SDO 3-state

ns

VDD = 5 V

8

20

VDD = 3 V

25

40

tw1

Pulse duration, CS

ns

VDD = 5 V

25

40

VDD = 3 V

17

30

td4

Delay time, CS high to SDO 3-state

ns

VDD = 5 V

15

25

VDD = 3 V

0.4

× tSCLK

twH

Pulse duration, SCLK high

ns

VDD = 5 V

0.4

× tSCLK

VDD = 3 V

0.4

× tSCLK

twL

Pulse duration, SCLK low

ns

VDD = 5 V

0.4

× tSCLK

VDD = 3 V

25

Frequency, SCLK

MHz

VDD = 5 V

25

Delay time, second falling edge of clock and CS to

VDD = 3 V

-2

5

td5

enter in powerdown (use minimum specification to

ns

VDD = 5 V

-2

5

avoid accidently entering powerdown) Figure 2

Delay time, CS and 10th falling edge of clock to enter in VDD = 3 V

2

-5

td6

powerdown (use maximum specification to avoid

ns

VDD = 5 V

2

-5

accidently entering powerdown) Figure 2

(1)

3-V Specifications apply from 2.35 V to 3.6 V, and 5-V specifications apply from 4.75 V to 5.25 V.

(2)

With 50-pf load.

4

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