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SL70D0948 Datasheet(PDF) 6 Page - System Logic Semiconductor

Part No. SL70D0948
Description  48 OUTPUT LED DRIVER / 9 BIT PWM CONTROLLER
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Maker  SLS [System Logic Semiconductor]
Homepage  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL70D0948 Datasheet(HTML) 6 Page - System Logic Semiconductor

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SLS System Logic Semiconductor
SL70D0948
PIN DESCRIPTION
PIN NAME
FUNCTION
VDD
5 V Power supply terminal.
GND
GND terminals for LED Drivers and control logic.
All GND terminals must be connected to GND level.
Do not left any GND terminal to NC.
DIN8 ~ DIN0
Data input terminals for 9bit R, G, B data.
Shift register accepts R, G, B data from these terminals.
(at rising edge of SHCLK)
DOUT8 ~ DOUT0
Output terminals of shift register output data for next
DIN8 ~ DIN0 terminals.
/RESET
Reset input terminal (Low active).
SHCLK
Shift register clock input terminal.
STROBE
Strobe signal input terminal. At rising edge of strobe signal,
48 channels of 9 bit data registers copy R, G, B data from
shift register.
/CE1
Chip enable signal input terminal (Low active).
CE2
Chip enable signal input terminal (High active).
The device accepts SHCLK and STROBE when /CE1 = “L ”
and CE2 = “H ”.
OEB
Output enable signal input terminal.
The device outputs data when OEB = “L ”. When OEB = “H ”
all R, G, B output terminals hold high-impedance state.
PWCLK
PWM generator reference clock input terminal.
BRMODE
Brightness control mode input terminal.
BRD2 ~ BRD0
Brightness control data input terminal.
PIN No.
(MQFP)
49,52,53,54,78,99
9, 16, 23, 33,
34, 41, 48,
59, 65, 72,74
84, 91, 98
100, 1, 2,
3, 4, 5,
6, 7, 8
32, 31, 30,
29, 28, 27,
26, 25, 24
83
82
81
80
79
76
77
75
56, 57, 58


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