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CY14MC256J Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CY14MC256J Datasheet(HTML) 1 Page - Cypress Semiconductor |
1 / 30 page CY14MC256J CY14MB256J CY14ME256J 256-Kbit (32 K × 8) Serial (I2C) nvSRAM Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-65233 Rev. *D Revised July 25, 2012 256-Kbit (32 K × 8) Serial (I2C) nvSRAM Features ■ 256-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 32 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using I2C command (Software STORE) or HSB pin (Hardware STORE) ❐ RECALL to SRAM initiated on power-up (Power-Up RECALL) or by I2C command (Software RECALL) ❐ Automatic STORE on power-down with a small capacitor (except for CY14MX256J1) ■ High reliability ❐ Infinite read, write, and RECALL cycles ❐ 1 million STORE cycles to QuantumTrap ❐ Data retention: 20 years at 85 C ■ High speed I 2C interface ❐ Industry standard 100 kHz and 400 kHz speed ❐ Fast-mode Plus: 1 MHz speed ❐ High speed: 3.4 MHz ❐ Zero cycle delay reads and writes ■ Write protection ❐ Hardware protection using Write Protect (WP) pin ❐ Software block protection for one quarter, half, or entire array ■ I 2C access to special functions ❐ Nonvolatile STORE/RECALL ❐ 8 byte serial number ❐ Manufacturer ID and Product ID ❐ Sleep mode ■ Low power consumption ❐ Average active current of 1 mA at 3.4-MHz operation ❐ Average standby mode current of 150 µA ❐ Sleep mode current of 8 µA ■ Industry standard configurations ❐ Operating voltages: • CY14MC256J: VCC = 2.4 V to 2.6 V • CY14MB256J: VCC = 2.7 V to 3.6 V • CY14ME256J: VCC = 4.5 V to 5.5 V ❐ Industrial temperature ❐ 8- and 16-pin small outline integrated circuit (SOIC) package ❐ Restriction of hazardous substances (RoHS) compliant Overview The Cypress CY14MC256J/CY14MB256J/CY14ME256J combines a 256-Kbit nvSRAM[1] with a nonvolatile element in each memory cell. The memory is organized as 32 K words of 8 bits each. The embedded nonvolatile elements incorporate the QuantumTrap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the QuantumTrap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down (except for CY14MX256J1). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). The STORE and RECALL operations can also be initiated by the user through I2C commands. Configuration Feature CY14MX256J1 CY14MX256J2 CY14MX256J3 AutoStore No Yes Yes Software STORE Yes Yes Yes Hardware STORE No No Yes Slave Address pins A2, A1, A0 A2, A1 A2, A1, A0 Serial Number 8 x 8 Manufacturer ID / Product ID Memory Control Register Command Register I C Control Logic Slave Address Decoder Power Control Block Control Registers Slave Memory Address and Data Control QuantumTrap 32 K x 8 SRAM 32 K x 8 STORE SDA SCL A2, A1, A0 WP VCC VCAP RECALL Sleep 2 Memory Slave Logic Block Diagram Note 1. Serial (I2C) nvSRAM is referred to as nvSRAM throughout the datasheet. |
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