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CY8CMBR2010-24LQXI Datasheet(PDF) 10 Page - Cypress Semiconductor |
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CY8CMBR2010-24LQXI Datasheet(HTML) 10 Page - Cypress Semiconductor |
10 / 31 page CY8CMBR2010 Document Number: 001-74495 Rev. *A Page 10 of 31 Figure 12. Power-on LED Effect Sequence 3 with Two Button Design Analog Voltage Support ■ A general external resistive network with a host processor is shown in Figure 13. ■ Host can be configured to perform different functions based on the voltage level at input pins. This is controlled by switches. ■ These switches can be controlled by CapSense buttons. ■ If enabled, GPOs replace these switches in the network. ■ GPOs are in Open Drain Low drive mode. ■ GPOs cannot be used for the resistive network and LED drive simultaneously. Instead, the Backlighting pin acts as a GPO for LED drive, controlled by all the CSx buttons. ■ If only one button needs to be ON for analog voltage support, FSS should be enabled. ■ For CY8CMBR2010, a simple external resistive network is shown in Figure 14. Figure 13. A General External Resistive Network Figure 14. Analog Voltage Support for CY8CMBR2010 GPO0 LED Brightness 300 ms 300 ms Power on 350ms/ 1000 ms Normal Operation Effects completed GPO1 LED Brightness 300 ms 300 ms 1550 ms / 2200 ms 0% 0% 0% 100% 100% Host Processor VDD VDD R1 R2 R3 R4 R7 R6 R8 R5 Key 1 Key 2 Host Processor VDD VDD R1 R2 R3 R4 R7 R6 R8 R5 Key 1 Key 2 GPO2 GPO1 GPO3 GPO4 GPO6 GPO5 GPO7 GPO8 |
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