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CY7C65642-48AXC Datasheet(PDF) 11 Page - Cypress Semiconductor |
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CY7C65642-48AXC Datasheet(HTML) 11 Page - Cypress Semiconductor |
11 / 21 page CY7C65642 Document Number: 001-65659 Rev. *C Page 11 of 21 Upstream Port D– 1 I/O/Z Upstream D– Signal. D+ 2 I/O/Z Upstream D+ Signal. Downstream Port 1 DD–[1] 3 I/O/Z Downstream D– Signal. DD+[1] 4 I/O/Z Downstream D+ Signal. OVR#[1] 25 I(RUP) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition Detection Input. Downstream Port 2 DD–[2] 6 I/O/Z Downstream D– Signal. DD+[2] 7 I/O/Z Downstream D+ Signal. OVR#[2] 24 I(RUP) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition Detection Input. Downstream Port 3 DD–[3] 12 I/O/Z Downstream D– Signal. DD+[3] 13 I/O/Z Downstream D+ Signal. OVR#[3] 20 I(RUP) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition Detection Input. Downstream Port 4 DD–[4] 15 I/O/Z Downstream D– Signal. DD+[4] 16 I/O/Z Downstream D+ Signal. OVR#[4] 19 I(RUP) Overcurrent Condition Detection Input. Active LOW Overcurrent Condition Detection Input. GND PAD P Ground pin for the chip. It is the solderable exposed pad beneath the chip. Refer to the Figure 4 on page 18. Pin Types: I = Input, O = Output, P = Power/ground, Z = High Impedance, RDN = Pad internal Pull-Down Resistor, RUP = Pad internal Pull-Up Resistor. Table 2. Pin Assignments Name 28-QFN pin no. Type Description |
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