CY7C1648KV18-400BZXC datasheet(2/30 Pages) CYPRESS

Part #	CY7C1648KV18-400BZXC

Description	144-Mbit DDR II SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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2 / 30 page

CY7C1648KV18

CY7C1650KV18

Document Number: 001-44061 Rev. *H

Page 2 of 30

Logic Block Diagram – CY7C1648KV18

Logic Block Diagram – CY7C1650KV18

Write

Reg

Write

Reg

CLK

A(21:0)

Gen.

K

Control

Logic

Address

Register

Read Data Reg.

R/W

Output

Logic

Reg.

18

36

18

BWS[1:0]

VREF

18

22

18

LD

Control

R/W

DOFF

18

DQ[17:0]

18

CQ

QVLD

Write

Reg

Write

Reg

CLK

A(20:0)

Gen.

K

Control

Logic

Address

Register

Read Data Reg.

R/W

Output

Logic

Reg.

36

72

36

BWS[3:0]

VREF

36

21

36

LD

Control

R/W

DOFF

36

DQ[35:0]

36

CQ

QVLD

Similar Part No. - CY7C1648KV18-400BZXC

Manufacturer	Part #	Datasheet	Description
Cypress Semiconductor	CY7C1648KV18-400BZXC	783Kb / 29P	144-Mbit DDR II SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)

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CY7C1648KV18-400BZXC Datasheet(PDF) 2 Page - Cypress Semiconductor

CY7C1648KV18-400BZXC Datasheet(HTML) 2 Page - Cypress Semiconductor

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