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MCIMX503CVK8B Datasheet(PDF) 77 Page - Freescale Semiconductor, Inc |
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MCIMX503CVK8B Datasheet(HTML) 77 Page - Freescale Semiconductor, Inc |
77 / 134 page Electrical Characteristics i.MX50 Applications Processors for Consumer Products, Rev. 2 Freescale Semiconductor 77 4.9.3 Enhanced Secured Digital Host Controller (eSDHCv2/v3) and uSDHC AC Timing This section describes the electrical information of the eSDHCv2/v3 and the uSDHC, which includes SD/eMMC4.3 (Single Data Rate) timing and eMMC4.4 (Dual Date Rate) timing. 4.9.3.1 SD/eMMC4.3 (Single Data Rate) eSDHCv3 and uSDHC AC Timing Figure 36 depicts the timing of SD/eMMC4.3, and Table 53 lists the SD/eMMC4.3 timing characteristics. Figure 36. SD/eMMC4.3 Timing Table 53. SD/eMMC4.3 Interface Timing Specification ID Parameter Symbols Min Max Unit Card Input Clock SD1 Clock Frequency (Low Speed) fPP 1 0400 kHz Clock Frequency (SD/SDIO Full Speed/High Speed) fPP 2 0 25/50 MHz Clock Frequency (MMC Full Speed/High Speed) fPP 3 0 20/52 MHz Clock Frequency (Identification Mode) fOD 100 400 kHz SD2 Clock Low Time tWL 7— ns SD3 Clock High Time tWH 7— ns SD4 Clock Rise Time tTLH —3 ns SD5 Clock Fall Time tTHL —3 ns SD1 SD3 SD5 SD4 SD7 CMD output from eSDHCv2 to card DAT1 ...... DAT7 DAT0 CMD input from card to eSDHCv2 DAT1 ...... DAT7 DAT0 SCK SD2 SD8 SD6 |
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