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MCIMX507CVM8B Datasheet(PDF) 82 Page - Freescale Semiconductor, Inc |
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MCIMX507CVM8B Datasheet(HTML) 82 Page - Freescale Semiconductor, Inc |
82 / 134 page i.MX50 Applications Processors for Consumer Products, Rev. 2 82 Freescale Semiconductor Electrical Characteristics 4.9.6 One-Wire (OWIRE) Timing Parameters Figure 42 depicts the RPP timing, and Table 59 lists the RPP timing parameters. Figure 42. Reset and Presence Pulses (RPP) Timing Diagram IC4 Data hold time 01 3.452 01 0.92 µs IC5 HIGH Period of I2CLK Clock 4.0 — 0.6 — µs IC6 LOW Period of the I2CLK Clock 4.7 — 1.3 — µs IC7 Set-up time for a repeated START condition 4.7 — 0.6 — µs IC8 Data set-up time 250 — 1003 —ns IC9 Bus free time between a STOP and START condition 4.7 — 1.3 — µs IC10 Rise time of both I2DAT and I2CLK signals — 1000 20 + 0.1Cb 4 300 ns IC11 Fall time of both I2DAT and I2CLK signals — 300 20 + 0.1Cb 4 300 ns IC12 Capacitive load for each bus line (Cb) — 400 — 400 pF 1 A device must internally provide a hold time of at least 300 ns for I2DAT signal in order to bridge the undefined region of the falling edge of I2CLK. 2 The maximum hold time has only to be met if the device does not stretch the LOW period (ID no IC5) of the I2CLK signal. 3 A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement of Set-up time (ID No IC7) of 250 ns must be met. This automatically is the case if the device does not stretch the LOW period of the I2CLK signal. If such a device does stretch the LOW period of the I2CLK signal, it must output the next data bit to the I2DAT line max_rise_time (IC9) + data_setup_time (IC7) = 1000 + 250 = 1250 ns (according to the Standard-mode I2C-bus specification) before the I2CLK line is released. 4 C b = total capacitance of one bus line in pF. Table 58. I2C Module Timing Parameters (continued) ID Parameter Standard Mode Supply Voltage = 1.65 V–1.95 V, 2.7 V–3.3 V Fast Mode Supply Voltage = 2.7 V–3.3 V Unit Min Max Min Max One-Wire bus One Wire Device Tx “Presence Pulse” (BATT_LINE) One-WIRE Tx “Reset Pulse” OW1 OW2 OW3 OW4 tR |
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