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EN39SL800 Datasheet(PDF) 15 Page - Eon Silicon Solution Inc.
EON [Eon Silicon Solution Inc.]
EN39SL800 Datasheet(HTML) 15 Page - Eon Silicon Solution Inc.
/ 45 page
This Data Sheet may be revised by subsequent versions
©2004 Eon Silicon Solution, Inc.,
or modifications due to changes in technical specifications.
Rev. H, Issue Date: 2011/02/14
Writing the reset command to the device resets the device to reading array data. Address bits are don’t-
care for this command.
The reset command may be written between the sequence cycles in an erase command sequence before
erasing begins. This resets the device to reading array data. Once erasure begins, however, the device
ignores reset commands until the operation is complete. The reset command may be written between the
sequence cycles in a program command sequence before programming begins. This resets the device to
reading array data (also applies to programming in Erase Suspend mode). Once programming begins,
however, the device ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command must be written to return to reading array data (also
applies to autoselect during Erase Suspend).
If DQ5 goes high during a program or erase operation, writing the reset command returns the device to
reading array data (also applies during Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host system to access the manufacturer and devices
codes, and determine whether or not a block is protected. The Command Definitions table shows the
address and data requirements. This is an alternative to the method that requires V
on address bit A9
and is intended for PROM programmers.
Two unlock cycles followed by the autoselect command initiate the autoselect command sequence.
Autoselect mode is then entered and the system may read at addresses shown in Table 4 any number of
times, without needing another command sequence.
The system must write the reset command to exit the autoselect mode and return to reading array data.
Programming the EN39SL800 is performed by using a four bus-cycle operation (two unlock write cycles
followed by the Program Setup command and Program Data Write cycle). When the program command
is executed, no additional CPU controls or timings are necessary. An internal timer terminates the
program operation automatically. Address is latched on the falling edge of CE# or WE#, whichever is last;
data is latched on the rising edge of CE# or WE#, whichever is first.
Programming status may be checked by sampling data on DQ7 (DATA# polling) or on DQ6 (toggle bit).
When the program operation is successfully completed, the device returns to read mode and the user can
read the data programmed to the device at that address. Note that data can not be programmed from a 0
to a 1. Only an erase operation can change a data from 0 to 1. When programming time limit is exceeded,
DQ5 will produce a logical “1” and a Reset command can return the device to Read mode.
Chip Erase Command
Chip erase is a six-bus-cycle operation. The chip erase command sequence is initiated by writing two
unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the
chip erase command, which in turn invokes the Embedded Erase algorithm. The device does not require
the system to preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and
verifies the entire memory for an all zero data pattern prior to electrical erase. The system is not required
to provide any controls or timings during these operations. The Command Definitions table shows the
address and data requirements for the chip erase command sequence.
Any commands written to the chip during the Embedded Chip Erase algorithm are ignored.
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