EN39SL800_11 datasheet(10/45 Pages) EON | 8 Megabit (512K x 16-bit) Flash Memory With 4Kbytes Uniform Sector, CMOS 1.8 Volt-only

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EN39SL800

Rev. H, Issue Date: 2011/02/14

completion of a program or erase operation by reading the DQ[7] (Data# Polling) and DQ[6] (Toggle) status

bits.

The ‘Command Definitions’ section of this document provides details on the specific device commands

implemented in the EN39SL800.

Block Protection and Chip Unprotection

The EN39SL800 includes the hardware block protection feature, which disables both program and erase

operations in any block. The block protect feature is enabled using programming equipment at the user’s

site. Block is unprotected when the devices are shipped.

Block Protection

To activate the block protection mode, the programming equipment must force VID on address pin A9 and

control pin OE#, (VID=10V ± 1.0V), CE# = WE# = VIL. The block addresses (A18-A15) should be set to the

block to be protected while (A6, A1, A0) = (VIL, VIH, VIL). Programming of the protection circuitry begins on

the falling edge and is terminated with the rising edge of the WE# pulse. Addresses must be held constant

during the WE# pulse. Please see Flowchart 7a for Block Protection Algorithms and Figure 11 for the

waveform of timings.

Verification of the protection circuitry requires the programming equipment to apply VID on address pin A9

while OE# is set at VIL, WE# is at VIH and (A6, A1, A0) = (VIL, VIH, VIL). To check for block protection,

scanning of A18 – A15 while (A6, A1, A0) = (VIL, VIH, VIL) and activating CE# will produce 01H at the

device’s outputs (DQ0 – DQ7). During this mode, the lower addresses (except for A0, A1, and A6) are

don’t care (can be VIL or VIH but not floating).

The unspecified addresses are don’t care which means they can be VIL, or VIH, but should not be floating.

We also recommend that the data pins also be at VIL or VIH during the time that WE# is at VIL.

Chip Unprotection

Previously protected blocks can be unprotected using the chip unprotection algorithm as seen in Flowchart

7b and

Figure 12 for the waveform of timings. All blocks must be placed in the protection mode using

protection algorithm mentioned above before unprotection can be executed.

To activate the chip unprotection mode, the programming equipment must force VID on address pin A9 and

control pin OE#, (VID=10V ± 1.0V), CE# = WE# = VIL. And set addresses (A6, A1, A0) = (VIH, VIH, VIL). The

unprotection circuitry is then invoked by keeping WE# at VIL for a length of tWPP2.

To determine if unprotection is complete, each block must be verified. The chip unprotect verify mode is

entered by setting OE#=VIL, WE#=VIH, and raising A9 to VID. The unprotection status can then be read

from DQ0-DQ7 by setting block address bits A18-A15 to the desired block address, and A6=1, A1=1, A0=0,

and CE# to VIL. A 00h on DQ0-DQ7 indicates that unprotection of that particular block is complete;

otherwise repeat the process by re-entering the unprotection mode and re-invoking the unprotection

circuitry for a period of tWPP2. Repeat the process also if the unprotection status of any other blocks does

not indicate 00h on DQ0-DQ7. When DQ0-DQ7 reads 00h for all blocks, chip unprotection is complete.

Automatic Sleep Mode

The automatic sleep mode minimizes Flash device energy consumption. The device automatically enables

this mode when addresses remain stable for tacc + 30ns. The automatic sleep mode is independent of the

CE#, WE# and OE# control signals. Standard address access timings provide new data when addresses

are changed. While in sleep mode, output is latched and always available to the system. Icc4 in the DC

Characteristics table represents the automatic sleep mode current specification.

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