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EN29GL064AT Datasheet(PDF) 34 Page - Eon Silicon Solution Inc. |
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EN29GL064AT Datasheet(HTML) 34 Page - Eon Silicon Solution Inc. |
34 / 58 page ![]() This Data Sheet may be revised by subsequent versions ©2004 Eon Silicon Solution, Inc., www.eonssi.com or modifications due to changes in technical specifications. 34 EN29GL064AT/B Rev. B, Issue Date: 2011/04/12 COMMON FLASH INTERFACE (CFI) The common flash interface (CFI) specification outlines device and host systems software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. Software support can then be device-independent, JEDEC ID- independent, and forward- and backward-compatible for the specified flash device families. Flash vendors can standardize their existing interfaces for long-term compatibility. This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to address 55h in word mode (or address AAh in byte mode), any time the device is ready to read array data. The system can read CFI information at the addresses given in Tables 9~11.In word mode, the upper address bits (A7–MSB) must be all zeros. To terminate reading CFI data, the system must write the reset command. The system can also write the CFI query command when the device is in the autoselect mode. The device enters the CFI query mode and the system can read CFI data at the addresses given in Tables 9~11. The system must write the reset command to return the device to the autoselect mode. Table 9. CFI Query Identification String Addresses (Word Mode) Data Description 10h 11h 12h 0051h 0052h 0059h Query Unique ASCII string “QRY” 13h 14h 0002h 0000h Primary OEM Command Set 15h 16h 0040h 0000h Address for Primary Extended Table 17h 18h 0000h 0000h Alternate OEM Command set (00h = none exists) 19h 1Ah 0000h 0000h Address for Alternate OEM Extended Table (00h = none exists) Table 10. System Interface String Addresses (Word Mode) Data Description 1Bh 0027h Vcc Min (write/erase) DQ7-DQ4: volt, DQ3-DQ0: 100mV 1Ch 0036h Vcc Max (write/erase) DQ7-DQ4: volt, DQ3-DQ0: 100mV 1Dh 0000h Vpp Min voltage (00h = no Vpp pin present) 1Eh 0000h Vpp Max voltage (00h = no Vpp pin present) 1Fh 0003h Typical timeout per single byte/word write 2 N µs 20h 0004h Typical timeout for min size buffer write 2 N µs (00h = not supported) 21h 0009h Typical timeout per individual block erase 2 N ms 22h 0000h Typical timeout for full chip erase 2 N ms (00h = not supported) 23h 0005h Max timeout for byte/word write 2 N times typical 24h 0005h Max timeout for buffer write 2 N times typical 25h 0004h Max timeout per individual block erase 2 N times typical 26h 0000h Max timeout for full chip erase 2 N times typical (00h = not supported) |
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