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LTC4253 Datasheet(PDF) 4 Page - Linear Technology |
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LTC4253 Datasheet(HTML) 4 Page - Linear Technology |
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4 / 36 page  LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A-2 4 425212fd SYMBOL PARAMETER CONDITIONS LTC4252-1/-2 LTC4252A-1/-2 UNITS MIN TYP MAX MIN TYP MAX ITMR TIMER Pin Current Timer On (Initial Cycle/Latchoff/ Shutdown Cooling, Sourcing), VTMR = 2V 5.8 5.8 μA Timer Off (Initial Cycle, Sinking), VTMR = 2V 28 28 mA Timer On (Circuit Breaker, Sourcing, IDRN = 0μA), VTMR = 2V 230 230 μA Timer On (Circuit Breaker, Sourcing, IDRN = 50μA), VTMR = 2V 630 630 μA Timer Off (Circuit Breaker/ Shutdown Cooling, Sinking), VTMR = 2V 5.8 5.8 μA ΔITMRACC/ ΔIDRN [(ITMR at IDRN = 50μA) – (ITMR at IDRN = 0μA)]/ΔIDRN Timer On (Circuit Breaker with IDRN = 50μA) 8 8 μA/μA VDRNL DRAIN Pin Voltage Low Threshold For PWRGD Status (MS Only) 2.385 2.385 V IDRNL DRAIN Leakage Current VDRAIN = 5V (4V for LTC4252A) ± 0.1 ±1 ± 0.1 ±1 μA VDRNCL DRAIN Pin Clamp Voltage IDRN = 50μA 7 6 V VPGL PWRGD Output Low Voltage IPG = 1.6mA (MS Only) IPG = 5mA (MS Only) ● ● 0.2 0.4 1.1 0.2 0.4 1.1 V V IPGH PWRGD Pull-Up Current VPWRGD = 0V (Sourcing) (MS Only) ● 40 58 80 40 58 80 μA tSS SS Default Ramp Period SS Pin Floating, VSS Ramps from 0.2V to 2V 180 μs SS Pin Floating, VSS Ramps from 0.1V to 0.9V 230 μs tPLLUG UV Low to Gate Low 0.4 0.4 μs tPHLOG OV High to Gate Low 0.4 0.4 μs ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 2) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to VEE unless otherwise specified. |
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Similar Description - LTC4253 |
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