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LTC1871-7 Datasheet(PDF) 10 Page - Linear Technology |
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LTC1871-7 Datasheet(HTML) 10 Page - Linear Technology |
10 / 36 page LTC3787 10 3787fc PIN FUNCTIONS (QFN/SSOP) SS (Pin 7/Pin 10): Output Soft-Start Input. A capacitor to ground at this pin sets the ramp rate of the output voltage during start-up. SENSE2– , SENSE1– (Pin 8, Pin 28/Pin 11, Pin 3): Nega- tive Current Sense Comparator Input. The (–) input to the current comparator is normally connected to the negative terminal of a current sense resistor connected in series with the inductor. SENSE2+, SENSE1+ (Pin 9, Pin 27/Pin 12, Pin 2): Posi- tive Current Sense Comparator Input. The (+) input to the current comparator is normally connected to the positive terminal of a current sense resistor. The current sense resis- tor is normally placed at the input of the boost controller in series with the inductor. This pin also supplies power to the current comparator. The common mode voltage range on SENSE+ and SENSE– pins is 2.5V to 38V (40V abs max). VFB (Pin 10/Pin 13): Error Amplifier Feedback Input. This pin receives the remotely sensed feedback voltage from an external resistive divider connected across the output. ITH (Pin 11/Pin 14): Current Control Threshold and Error Amplifier Compensation Point. The voltage on this pin sets the current trip threshold. NC (Pin 12/Pin 15): No Connect. SW2, SW1 (Pin 13, Pin 24/Pin 16, Pin 27): Switch Node. Connect to the source of the synchronous N-channel MOSFET, the drain of the main N-channel MOSFET and the inductor. TG2, TG1 (Pin 14, Pin 23/Pin 17, Pin 26): Top Gate. Con- nect to the gate of the synchronous N-channel MOSFET. BOOST2, BOOST1 (Pin 15, Pin 22/Pin 18, Pin 25): Float- ing power supply for the synchronous N-channel MOSFET. Bypass to SW with a capacitor and supply with a Schottky diode connected to INTVCC. PGND (Pin 19/Pin 22): Driver Power Ground. Connects to the sources of bottom (main) N-channel MOSFETs and the (–) terminal(s) of CIN and COUT. BG2, BG1 (Pin 16, Pin 21/Pin 19, Pin 24): Bottom Gate. Connect to the gate of the main N-channel MOSFET. INTVCC (Pin 17/Pin 20): Output of Internal 5.4V LDO. Power supply for control circuits and gate drivers. De- couple this pin to GND with a minimum 4.7μF low ESR ceramic capacitor. EXTVCC (Pin 18/Pin 21): External Power Input. When this pin is between 4.8V and 6V, an internal switch bypasses the internal regulator and supply power to INTVCC directly from EXTVCC. Do not float this pin. It can be connected to ground when not used. VBIAS (Pin 20/Pin 23): Main Supply Pin. It is normally tied to the input supply VIN or to the output of the boost converter. A bypass capacitor should be tied between this pin and the signal ground pin. The operating voltage range on this pin is 4.5V to 38V (40V abs max). PGOOD (Pin 25/Pin 28): Power Good Indicator. Open-drain logic output that is pulled to ground when the output volt- age is more than ±10 % away from the regulated output voltage. To avoid false trips the output voltage must be outside the range for 25μs before this output is activated. ILIM (Pin 26/Pin 1): Current Comparator Sense Voltage Range Input. This pin is used to set the peak current sense voltage in the current comparator. Connect this pin to SGND, open, and INTVCC to set the peak current sense voltage to 50mV, 75mV and 100mV, respectively. GND (Exposed Pad Pin 29) UFD Package: Ground. Must be soldered to the PCB for rated thermal performance. |
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