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LTC3250-1.5 Datasheet(PDF) 9 Page - Linear Technology

Part # LTC3250-1.5
Description  High Voltage, Low Quiescent Current
Download  12 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3250-1.5 Datasheet(HTML) 9 Page - Linear Technology

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LTC3261
9
3261f
APPLICATIONS INFORMATION
should be consulted to ensure the desired capacitance at
all temperatures and voltages. Table 1 is a list of ceramic
capacitor manufacturers and their websites.
Table 1
AVX
www.avxcorp.com
Kemet
www.kemet.com
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
Vishay
www.vishay.com
TDK
www.component.tdk.com
Layout Considerations
Due to high switching frequency and high transient currents
produced by LTC3261, careful board layout is necessary
for optimum performance. A true ground plane and short
connections to all the external capacitors will improve
performance and ensure proper regulation under all condi-
tions. Figure 3 shows an example layout for the LTC3261.
The flying capacitor nodes C+ and Cswitch large currents
at a high frequency. These nodes should not be routed
close to sensitive pins such as the RT pin .
Thermal Management
At high input voltages and maximum output current, there
can be substantial power dissipation in the LTC3261. If
the junction temperature increases above approximately
175°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
groundplaneisrecommended.Connectingtheexposedpad
of the package to a ground plane under the device on two
layers of the PC board can reduce the thermal resistance
of the package and PC board considerably.
Derating Power at High Temperatures
To prevent an overtemperature condition in high power
applications, Figure 4 should be used to determine the
maximum combination of ambient temperature and power
dissipation.
The power dissipated in the LTC3261 should always fall
under the line shown for a given ambient temperature.
The power dissipated in the LTC3261 is:
PD = (VIN – |VOUT|) • (IOUT)
where IOUT denotes output current at the VOUT pin.
The derating curve in Figure 4 assumes a maximum thermal
resistance, θJA, of 40°C/W for the package. This can be
achieved from a printed circuit board layout with a solid
ground plane and a good connection to the exposed pad
of the LTC3261 package.
It is recommended that the LTC3261 be operated in the
region corresponding to TJ ≤ 150°C for continuous opera-
tion as shown in Figure 4. Short-term operation may be
acceptable for 150°C < TJ < 175°C but long-term operation
in this region should be avoided as it may reduce the life of
the part or cause degraded performance. For TJ > 175°C
the part will be in thermal shutdown.
Figure 3. Recommended Layout
Figure 4. Maximum Power Dissipation vs Ambient Temperature
AMBIENT TEMPERATURE (°C)
–50
0
6
4
5
2
3
1
75
50
25
0
125
100
–25
175
150
3261 F04
θJA = 40°C/W
THERMAL
SHUTDOWN
RECOMMENDED
OPERATION
TJ = 150°C
TJ = 175°C
GND
GND
3261 F03
CFLY
RT
VIN
VOUT
EN
MODE


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