LTC3261

6

3261f

BLOCK DIAGRAM

CHARGE

PUMP

AND

INPUT

LOGIC

50kHz

TO

500kHz

OSC

S1

S4

S3

2

13

GND

3261 BD

5

8

9

4

10

EN

MODE

RT

11

S2

PIN FUNCTIONS

NC (Pins 1, 3, 6, 7,12): No Connect Pins. These pins are

not connected to the LTC3261 die. These pins should be

left floating or connected to ground. Pins 6 and 7 can also

be shorted to adjacent pins.

RT (Pin 2): Input Connection for Programming the Switch-

ing Frequency. The RT pin servos to a fixed 1.2V when

the EN pin is driven to a logic “high”. A resistor from RT

to GND sets the charge pump switching frequency. If the

RT pin is tied to GND, the switching frequency defaults

to a fixed 500kHz.

In Burst Mode operation, (MODE = high) this pin voltage is

with hysteretic control.

Flying Capacitor Negative Connection.

Flying Capacitor Positive Connection.

be bypassed with a low impedance ceramic capacitor.

EN (Pin 10): Logic Input. A logic “high” on the EN pin

enables the inverting charge pump.

MODE (Pin 12): Logic Input. The MODE pin deter-

mines the charge pump operating mode. A logic “high”

on the MODE pin forces the charge pump into Burst

MODE pin forces the charge pump to operate as an open-

loop inverter with a constant switching frequency. The

switching frequency in both modes is determined by an

external resistor from the RT pin to GND. In Burst Mode,

this represents the frequency of the burst cycles before

the part enters the low quiescent current sleep state.

GND (Exposed Pad Pin 13): Ground. The exposed pack-

age pad is ground and must be soldered to the PC board

ground plane for proper functionality and for rated thermal

performance.