 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
LTC2241-12 Datasheet(PDF) 1 Page - Linear Technology |
|
||||||||||||||||||||||||||||||
LTC2241-12 Datasheet(HTML) 1 Page - Linear Technology |
|
|
1 / 34 page  1 21576514fa LTC2157-14/ LTC2156-14/LTC2155-14 TYPICAL APPLICATION FEATURES APPLICATIONS DESCRIPTION Dual 14-Bit 250Msps/ 210Msps/170Msps ADCs n Communications n Cellular Basestations n Software Defined Radios n Medical Imaging n High Definition Video n Testing and Measurement Instruments n 70dB SNR n 90dB SFDR n Low Power: 650mW/616mW/567mW Total n Single 1.8V Supply n DDR LVDS Outputs n Easy-to-Drive 1.5VP-P Input Range n 1.25GHz Full Power Bandwidth S/H n Optional Clock Duty Cycle Stabilizer n Low Power Sleep and Nap Modes n Serial SPI Port for Configuration n Pin-Compatible 12-Bit Versions n 64-Pin (9mm × 9mm) QFN Package The LTC ®2157-14/LTC2156-14/LTC2155-14 are 2-channel simultaneous sampling 250Msps/210Msps/170Msps 14-bit A/D converters designed for digitizing high fre- quency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70dB SNR and 90dB spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to undersample high frequencies with good performance. The latency is only five clock cycles. DC specs include ±0.85LSB INL (typ), ±0.25LSB DNL (typ) and no missing codes over temperature. The transition noise is 1.82LSBRMS. The digital outputs are double data rate (DDR) LVDS. The ENC+ and ENC– inputs can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. S/H CORRECTION LOGIC OUTPUT DRIVERS 14-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL DA12_13 DA0_1 DB12_13 DB0_1 CLOCK ANALOG INPUT 21576514 TA01 DDR LVDS DDR LVDS VDD OVDD OGND OGND GND CHANNEL A S/H CORRECTION LOGIC OUTPUT DRIVERS 14-BIT PIPELINED ADC CORE ANALOG INPUT OVDD CHANNEL B FREQUENCY (MHz) 0 –120 –100 –80 –60 –40 0 20 40 60 80 21576514 TA01b 100 120 –20 LTC2157-14 32K Point FFT, fIN = 15MHz, –1dBFS, 250Msps |
Similar Part No. - LTC2241-12 |
|
Similar Description - LTC2241-12 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
