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LT1964 Datasheet(PDF) 5 Page - Linear Technology |
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LT1964 Datasheet(HTML) 5 Page - Linear Technology |
5 / 24 page LT3032 Series 5 3032fd ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3032 is tested and specified under pulse load conditions such that TJ ≅ TA. The LT3032E is 100% tested at TA = 25°C. Performance of the LT3032E over the full –40°C to 125°C operating junction temperature range is assured by design, characterization, and correlation with statistical process controls. The LT3032I regulators are guaranteed over the full –40°C to 125°C operating junction temperature range. Note 3: Parasitic diodes exist internally between the INN pin and the OUTN, ADJN, and SHDNN pins. These pins cannot be pulled more than 0.5V below the INN pin during fault conditions, and must remain at a voltage more positive than the INN pin during operation. Note 4: Operating conditions are limited by maximum junction temperature. Specifications do not apply for all possible combinations of input voltages and output currents. When operating at maximum input voltages, the output current ranges must be limited. When operating at maximum output currents, the input voltage ranges must be limited. Note 5: The LT3032 is tested and specified for these conditions with the ADJP pin tied to the OUTP pin and the ADJN pin tied to the OUTN pin. Note 6: To satisfy requirements for minimum input voltage, the LT3032 is tested and specified for these conditions with an external resistor divider (two 250k resistors) from OUTP/OUTN to the corresponding ADJP/ADJN pin to give an output voltage of ±2.44V. The external resistor divider adds a 5μA DC load on the output. The LT3032-12/LT3032-15 have higher internal resistor divider current, resulting in higher GND pin current at light/no load. Note 7: Dropout voltage is the minimum input-to-output voltage differential needed to maintain regulation at a specified output current. In dropout, output voltage equals: VINP/INN – VDROPOUT For lower output voltages, dropout voltage is limited by the minimum input voltage specification under some output voltage/load conditions; see curves for Minimum INN Voltage and Minimum INP Voltage in Typical Performance Characteristics. LTC is unable to guarantee Maximum Dropout Voltage specifications at 50mA and 150mA due to production test limitations with Kelvin-Sensing the package pins. Please consult the Typical Performance Characteristics for curves of Dropout Voltage as a function of Output Load Current and Temperature. Note 8: GND pin current is tested with VINP = VOUTP(NOMINAL) or VINN = VOUTN(NOMINAL) and a current source load. This means the device is tested while operating in its dropout region. This is the worst-case GND pin current. GND pin current decreases slightly at higher input voltages. Note 9: Positive current flow is into the pin. Negative current flow is out of the pin. Note 10: For input-to-output differential voltages from INN to OUTN greater than –7V, a –50μA load is needed to maintain regulation. Note 11: Reverse output current is tested with the INP pin grounded and the OUTP pin forced to the nominal output voltage. This current flows into the OUTP pin and out the GND pin. Note 12: Positive side current limit is tested at VINP = 2.3V or VOUTP(NOMINAL) + 1V (whichever is more positive). Negative side current limit is tested at VINN = –2.3V or VOUTN(NOMINAL) – 1V (whichever is more negative). Note 13: LTC is unable to guarantee load regulation specifications on fixed voltage versions of the LT3032 due to production test limitations with Kelvin-Sensing the package pins. Please consult the Typical Performance Characteristics for curves of Load Regulation as a function of Temperature. PARAMETER CONDITIONS MIN TYP MAX UNITS Output Voltage Noise (10Hz to 100kHz) COUTP = 10μF, CBYPP 0.01μF, ILOAD = 150mA COUTN = 10μF, CBYPN 0.01μF, ILOAD = –150mA 20 30 μVRMS μVRMS Ripple Rejection VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz VINP to VOUTP = 1.5V (Average), ILOAD = 100mA VINN to VOUTN = –1.5V (Average), ILOAD = –100mA 50 46 68 54 dB dB Current Limit (Note 12) VINP = 7V, VOUTP = 0V VINN = –7V, VOUTN = 0V VINP = 2.3V or VOUTP(NOMINAL) + 1V, ΔVOUTP = –0.1V VINN = –2.3V or VOUTP(NOMINAL) – 1V, ΔVOUTN = 0.1V l l 170 170 400 350 mA mA mA mA INP Reverse Leakage Current VINP = –20V, VOUTP = 0V l –1 mA INN Reverse Leakage Current VINN = 20V, VOUTN, VADJN, VSHDNN = Open Circuit l 1mA Reverse Output Current (Notes 5, 11) LT3032-5 LT3032-12 LT3032-15 LT3032 VOUTP = 5V, VINP < 5V VOUTP = 12V, VINP < 12V VOUTP = 15V, VINP < 15V VOUTP = VADJP = 1.22V, VINP < 1.22V 10 25 25 5 20 50 50 10 μA μA μA μA |
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