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INA3221AIRGV Datasheet(PDF) 3 Page - Texas Instruments

Part # INA3221AIRGV
Description  Triple-Channel, High-Side Measurement, Shunt and Bus Voltage Monitor
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

INA3221AIRGV Datasheet(HTML) 3 Page - Texas Instruments

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INA3221
www.ti.com
SBOS576 – MAY 2012
ELECTRICAL CHARACTERISTICS: VS = +3.3 V
At TA = +25°C, VIN+ = 12 V, VSENSE = (VIN+) – (VIN–) = 0 mV, and VBUS = 12 V, unless otherwise noted.
INA3221
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
Shunt
–160
159.96
mV
Voltage input range
Bus
0
26
V
CMR
Common-mode rejection
VIN+ = 0 V to +26 V
110
120
dB
±40
±80
μV
VOS
Shunt
TA = –40°C to +125°C
0.1
0.5
μV/°C
PSRR
vs power supply, VS = +2.7 V to +5.5 V
15
μV/V
Offset voltage,
RTI(1)
±8
±16
mV
VOS
Bus
TA = –40°C to +125°C
80
μV/°C
PSRR
vs power supply
0.5
mV/V
IIN+
10
μA
Input bias current
IIN–
10 || 670
μA || kΩ
Input leakage(2)
(VIN+ pin) + (VIN– pin), power-down mode
0.1
0.5
μA
DC ACCURACY
ADC native resolution
13
Bits
Shunt voltage
40
μV
1-LSB step size
Bus voltage
8
mV
0.1
0.25
%
Shunt
TA = –40°C to +125°C
10
50
ppm/°C
Voltage gain error
0.1
0.25
%
Bus
TA = –40°C to +125°C
10
50
ppm/°C
DNL
Differential nonlinearity
±0.1
LSB
CT bit = 000
140
154
µs
CT bit = 001
204
224
µs
CT bit = 010
332
365
µs
CT bit = 011
588
646
µs
tCONVERT
ADC conversion time
CT bit = 100
1.1
1.21
ms
CT bit = 101
2.116
2.328
ms
CT bit = 110
4.156
4.572
ms
CT bit = 111
8.244
9.068
ms
SMBus
SMBus timeout(3)
28
35
ms
DIGITAL INPUT/OUTPUT
CI
Input capacitance
3
pF
Leakage input current
0 V
≤ VIN ≤ VS
0.1
1
μA
VIH
0.7 (VS)
6
V
Input logic levels
VIL
–0.5
0.3 (VS)
V
SDA, critical, warning, PV
VS > +2.7 V, IOL = 3 mA
0
0.4
V
VOL
Output logic levels
TC
VS > +2.7 V, IOL = 1.2 mA
0
0.4
V
Vhys
Hysteresis voltage
500
mV
(1)
RTI = Referred-to-input.
(2)
Input leakage is positive (current flows into the pin) for the conditions shown at the top of this table. Negative leakage currents can occur
under different input conditions.
(3)
SMBus timeouts in the INA3221 reset the interface whenever SCL is low for more than 28 ms.
Copyright © 2012, Texas Instruments Incorporated
3


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