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DM9006 Datasheet(PDF) 30 Page - Davicom Semiconductor, Inc. |
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DM9006 Datasheet(HTML) 30 Page - Davicom Semiconductor, Inc. |
30 / 76 page ![]() DM9006 2-port Switch with Processor Interface 30 Preliminary datasheet DM9006-13-DS-P01 September 1, 2009 6.43 Ethernet Address Control / Status Register 1 (70H) Bit Name Default Description 7 RESERVED 0,RO Reserved 6:5 EACS P0,RO Status of Ethernet Address Command 00: Command OK, Entry Non-exist a. Create an new entry when command is write b. Do nothing when command is delete c. Entry not found when command is search d. Entry is invalid when command is read 01: Command OK, Entry Exist a. Overwrite the entry when command is write b. Delete entry when command is delete c. Entry found when command is search d. Entry is valid when command is read 1X: Command Error 4:3 EAI PHY,RW Ethernet Address Table Index 00: Unicast Address Table 01: Multicast Address Table 10: IGMP Table (Read Only) 11: Reserved 2:1 EAC PH0,RW Ethernet Address Command 00: Read 01: Write 10: Delete 11: Search 0 EAS P0,RO Ethernet Address Table Status 0: Available 1: Busy 6.44 Ethernet Address Data Register (71H~76H) Bit Name Default Description 71H EAD0 PH0,RW MAC Address bit 07~00 72H EAD1 PH0,RW MAC Address bit 15~08 73H EAD2 PH0,RW MAC Address bit 23~16 74H EAD3 PH0,RW MAC Address bit 31~24 75H EAD4 PH0,RW MAC Address bit 39~32 76H EAD5 PH0,RW MAC Address bit 47~40 6.45 Ethernet Address Control / Status Register 2 (77H) Bit Name Default Description 7 RESERVED 0,RO Reserved 6 OVERRIDE PH0,RW When writing table, this bit can set the entry to override the port’s setting in the receiving disable state of STP. When reading table, it indicates the entry is override one or not. This bit supports unicast and multicast address table both. 0: Entry is normal one. 1: Entry is override one. |
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