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DM9006 Datasheet(PDF) 17 Page - Davicom Semiconductor, Inc.

Part No. DM9006
Description  10/100 Mbps 2-port Ethernet Switch Controller with General Processor Interface
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Maker  DAVICOM [Davicom Semiconductor, Inc.]
Homepage  http://www.davicom.com.tw
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DM9006 Datasheet(HTML) 17 Page - Davicom Semiconductor, Inc.

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DM9006
2-port Switch with Processor Interface
Preliminary datasheet
17
DM9006-13-DS-P01
September 1, 2009
VLAN_TAGL
Per Port VLAN Tag Low Byte Register
6EH
01H
VLAN_TAGH
Per Port VLAN Tag High Byte Register
6FH
00H
P_MIB_IDX
Per Port MIB counter Index Register
80H
00H
MIB counter Data Register bit 0~7
81H
00H
MIB counter Data Register bit 8~15
82H
00H
MIB counter Data Register bit 16~23
83H
00H
MIB_DAT
MIB counter Data Register bit 24~31
84H
00H
PVLAN
Port-based VLAN mapping table registers
B0-BFH
0FH
TOS_MAP
TOS Priority Map Registers
C0-CFH
00H~FFH
VLAN_MAP
VLAN Priority Map Registers
D0-D1H
50H,FAH
MRCMDX
Memory Data Pre-Fetch Read Command Without Address
Increment Register
F0H
XXH
MRCMD
Memory Data Read Command With Address Increment
Register
F2H
XXH
MRRL
Memory Data Read_ address Register Low Byte
F4H
00H
MRRH
Memory Data Read_ address Register High Byte
F5H
00H
MWCMDX
Memory Data Write Command Without Address Increment
Register
F6H
XXH
MWCMD
Memory Data Write Command With Address Increment
Register
F8H
XXH
MWRL
Memory Data Write_ address Register Low Byte
FAH
00H
MWRH
Memory Data Write _ address Register High Byte
FBH
00H
TXPLL
TX Packet Length Low Byte Register
FCH
XXH
TXPLH
TX Packet Length High Byte Register
FDH
XXH
ISR
Interrupt Status Register
FEH
00H
IMR
Interrupt Mask Register
FFH
00H
Key to Default
In the register description that follows, the default column
takes the form:
<Reset Value>, <Access Type>
Where:
<Reset Value>:
1
Bit set to logic one
0
Bit set to logic zero
X
No default value
P = power on reset, by PWRST# pin, default value
H = hardware reset, by Reg. 52H bit 6, default value
S = software reset, by Reg. 00H bit 0, default value
E = default value from EEPROM setting
T = default value from strap pin
<Access Type>:
RO = Read only
RW = Read/Write
R/C = Read and Clear
RW/C1=Read/Write and Cleared by write 1
WO = Write only
Reserved bits should be written with 0.
Reserved bits are undefined on read access.


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