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Electronic Components Datasheet Search |
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DM9006 Datasheet(PDF) 46 Page - Davicom Semiconductor, Inc. |
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DM9006 Datasheet(HTML) 46 Page - Davicom Semiconductor, Inc. |
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46 / 76 page 
DM9006 2-port Switch with Processor Interface 46 Preliminary datasheet DM9006-13-DS-P01 September 1, 2009 the occurrence of a link failure condition causes the link status bit to be cleared and remain cleared until it is read via the management interface 1 Jabber detect 0, RO Jabber Detect 1 = Jabber condition detected 0 = No jabber This bit is implemented with a latching function. Jabber conditions will set this bit unless it is cleared by a read to this register through a management interface or a DM9006 reset. This bit works only in 10Mbps mode 0 Extended capability 1,RO/P Extended Capability 1 = Extended register capable 0 = Basic register capable only 8.3 PHY ID Identifier Register #1 (PHYID1) – 02H The PHY Identifier Registers #1 and #2 work together in a single identifier of the DM9006. The Identifier consists of a concatenation of the Organizationally Unique Identifier (OUI), a vendor's model number, and a model revision number. DAVICOM Semiconductor's IEEE assigned OUI is 00606E. Bit Bit Name Default Description 15-0 OUI_MSB <0181H> OUI Most Significant Bits This register stores bit 3 to 18 of the OUI (00606E) to bit 15 to 0 of this register respectively. The most significant two bits of the OUI are ignored (the IEEE standard refers to these as bit 1 and 2) 8.4 PHY ID Identifier Register #2 (PHYID2) – 03H Bit Bit Name Default Description 15-10 OUI_LSB <101110>, RO/P OUI Least Significant Bits Bit 19 to 24 of the OUI (00606E) are mapped to bit 15 to 10 of this register respectively 9-4 VNDR_MDL <001011>, RO/P Vendor Model Number Five bits of vendor model number mapped to bit 9 to 4 (most significant bit to bit 9) 3-0 MDL_REV <0000>, RO/P Model Revision Number Five bits of vendor model revision number mapped to bit 3 to 0 (most significant bit to bit 4) 8.5 Auto-negotiation Advertisement Register (ANAR) – 04H This register contains the advertised abilities of this DM9006 device as they will be transmitted to its link partner during Auto-negotiation. Bit Bit Name Default Description 15 NP 0,RO/P Next page Indication 1 = Next page available 0 = No next page available The DM9006 has no next page, so this bit is permanently set to 0 14 ACK 0,RO Acknowledge 1 = Link partner ability data reception acknowledged |
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